Rename stack-clash protection CFA register to avoid clash

gcc/ChangeLog:

	PR target/88851
	* config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New.
	* config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use
	it and document registers.

gcc/testsuite/ChangeLog:

	PR target/88851
	* gcc.target/aarch64/stack-check-cfa-3.c: Update test.

From-SVN: r268017

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 59f3974..8d426fe 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-01-17  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/88851
+       * config/aarch64/aarch64.md (STACK_CLASH_SVE_CFA_REGNUM): New.
+       * config/aarch64/aarch64.c (aarch64_allocate_and_probe_stack_space): Use
+       it and document registers.
+
 2019-01-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * config/aarch64/aarch64.c (ares_tunings): Define.

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 3c1818a..2010864 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -5343,11 +5343,11 @@ aarch64_allocate_and_probe_stack_space (rtx temp1, rtx temp2,
        {
          /* This is done to provide unwinding information for the stack
             adjustments we're about to do, however to prevent the optimizers
-            from removing the R15 move and leaving the CFA note (which would be
+            from removing the R11 move and leaving the CFA note (which would be
             very wrong) we tie the old and new stack pointer together.
             The tie will expand to nothing but the optimizers will not touch
             the instruction.  */
-         rtx stack_ptr_copy = gen_rtx_REG (Pmode, R15_REGNUM);
+         rtx stack_ptr_copy = gen_rtx_REG (Pmode, STACK_CLASH_SVE_CFA_REGNUM);
          emit_move_insn (stack_ptr_copy, stack_pointer_rtx);
          emit_insn (gen_stack_tie (stack_ptr_copy, stack_pointer_rtx));
 
@@ -5574,7 +5574,19 @@ aarch64_add_cfa_expression (rtx_insn *insn, unsigned int reg,
    to the stack we track as implicit probes are the FP/LR stores.
 
    For outgoing arguments we probe if the size is larger than 1KB, such that
-   the ABI specified buffer is maintained for the next callee.  */
+   the ABI specified buffer is maintained for the next callee.
+
+   The following registers are reserved during frame layout and should not be
+   used for any other purpose:
+
+   - r11: Used by stack clash protection when SVE is enabled.
+   - r12(EP0) and r13(EP1): Used as temporaries for stack adjustment.
+   - r14 and r15: Used for speculation tracking.
+   - r16(IP0), r17(IP1): Used by indirect tailcalls.
+   - r30(LR), r29(FP): Used by standard frame layout.
+
+   These registers must be avoided in frame layout related code unless the
+   explicit intention is to interact with one of the features listed above.  */
 
 /* Generate the prologue instructions for entry into a function.
    Establish the stack frame by decreasing the stack pointer with a

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index e65936a..522c774 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -35,15 +35,10 @@
     (R11_REGNUM                11)
     (R12_REGNUM                12)
     (R13_REGNUM                13)
-    ;; Scratch registers for prologue/epilogue use.
-    (EP0_REGNUM                12)
-    (EP1_REGNUM                13)
     (R14_REGNUM                14)
     (R15_REGNUM                15)
     (R16_REGNUM                16)
-    (IP0_REGNUM                16)
     (R17_REGNUM                17)
-    (IP1_REGNUM                17)
     (R18_REGNUM                18)
     (R19_REGNUM                19)
     (R20_REGNUM                20)
@@ -57,7 +52,6 @@
     (R28_REGNUM                28)
     (R29_REGNUM                29)
     (R30_REGNUM                30)
-    (LR_REGNUM         30)
     (SP_REGNUM         31)
     (V0_REGNUM         32)
     (V1_REGNUM         33)
@@ -113,10 +107,20 @@
     (P13_REGNUM                81)
     (P14_REGNUM                82)
     (P15_REGNUM                83)
+    ;; Scratch register used by stack clash protection to calculate
+    ;; SVE CFA offsets during probing.
+    (STACK_CLASH_SVE_CFA_REGNUM 11)
+    ;; Scratch registers for prologue/epilogue use.
+    (EP0_REGNUM         12)
+    (EP1_REGNUM         13)
     ;; A couple of call-clobbered registers that we need to reserve when
     ;; tracking speculation this is not ABI, so is subject to change.
-    (SPECULATION_TRACKER_REGNUM 15)
     (SPECULATION_SCRATCH_REGNUM 14)
+    (SPECULATION_TRACKER_REGNUM 15)
+    ;; Scratch registers used in frame layout.
+    (IP0_REGNUM         16)
+    (IP1_REGNUM         17)
+    (LR_REGNUM          30)
   ]
 )
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3075f47..632da85 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-01-17  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/88851
+       * gcc.target/aarch64/stack-check-cfa-3.c: Update test.
+
 2019-01-17  Nathan Sidwell  <nathan@acm.org>
 
        PR c++/86610

diff --git a/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-3.c b/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-3.c
index 41579f2..c4b7bb6 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-3.c
+++ b/gcc/testsuite/gcc.target/aarch64/stack-check-cfa-3.c
@@ -8,6 +8,6 @@
    need to make sure we can unwind correctly before the frame is set up.  So
    check that we're emitting r15 with a copy of sp an setting the CFA there.  */
 
-/* { dg-final { scan-assembler-times {mov\tx15, sp} 1 } } */
-/* { dg-final { scan-assembler-times {\.cfi_def_cfa_register 15} 1 } } */
+/* { dg-final { scan-assembler-times {mov\tx11, sp} 1 } } */
+/* { dg-final { scan-assembler-times {\.cfi_def_cfa_register 11} 1 } } */
 /* { dg-final { scan-assembler-times {\.cfi_escape 0xf,0xc,0x8f,0,0x92,0x2e,0,.*} 1 } } */