Fix issue dotnet/coreclr#8139 amd64 decoder bug. (dotnet/coreclr#8901)

Ignore modrm == 0 which ignores "inc dword ptr []" instructions.

Also fixed minor EEHeap formatting bug on Linux.

Commit migrated from https://github.com/dotnet/coreclr/commit/f2b0e13c2f828b52386b86a6b64cd0187d37c8d9

diff --git a/src/coreclr/src/ToolBox/SOS/Strike/eeheap.cpp b/src/coreclr/src/ToolBox/SOS/Strike/eeheap.cpp
index ac41e2d..5a5680f 100644 (file)
--- a/src/coreclr/src/ToolBox/SOS/Strike/eeheap.cpp
+++ b/src/coreclr/src/ToolBox/SOS/Strike/eeheap.cpp
@@ -1614,9 +1614,9 @@ void LoaderHeapTraverse(CLRDATA_ADDRESS blockData,size_t blockSize,BOOL blockIsC
 \**********************************************************************/
 void PrintHeapSize(DWORD_PTR total, DWORD_PTR wasted)
 {
-    ExtOut("Size: 0x%" POINTERSIZE_TYPE "x (%" POINTERSIZE_TYPE "lu) bytes", total, total);
+    ExtOut("Size: 0x%" POINTERSIZE_TYPE "x (%" POINTERSIZE_TYPE "u) bytes", total, total);
     if (wasted)
-        ExtOut(" total, 0x%" POINTERSIZE_TYPE "x (%" POINTERSIZE_TYPE "lu) bytes wasted", wasted,  wasted);    
+        ExtOut(" total, 0x%" POINTERSIZE_TYPE "x (%" POINTERSIZE_TYPE "u) bytes wasted", wasted,  wasted);    
     ExtOut(".\n");
 }
 

diff --git a/src/coreclr/src/debug/ee/amd64/amd64walker.cpp b/src/coreclr/src/debug/ee/amd64/amd64walker.cpp
index 836d214..39e9784 100644 (file)
--- a/src/coreclr/src/debug/ee/amd64/amd64walker.cpp
+++ b/src/coreclr/src/debug/ee/amd64/amd64walker.cpp
@@ -131,10 +131,11 @@ void NativeWalker::Decode()
     {
         case 0xff:
         {
-
             BYTE modrm = *ip++;
 
-            _ASSERT(modrm != NULL);
+            // Ignore "inc dword ptr [reg]" instructions
+            if (modrm == 0)
+                break;
             
             BYTE mod = (modrm & 0xC0) >> 6;
             BYTE reg = (modrm & 0x38) >> 3;

diff --git a/src/coreclr/src/jit/codegenxarch.cpp b/src/coreclr/src/jit/codegenxarch.cpp
index 827000b..1dce47f 100644 (file)
--- a/src/coreclr/src/jit/codegenxarch.cpp
+++ b/src/coreclr/src/jit/codegenxarch.cpp
@@ -4616,8 +4616,7 @@ void CodeGen::genStoreInd(GenTreePtr node)
                     assert(rmwSrc == data->gtGetOp2());
                     genCodeForShiftRMW(storeInd);
                 }
-                else if (!compiler->opts.compDbgCode && data->OperGet() == GT_ADD &&
-                         (rmwSrc->IsIntegralConst(1) || rmwSrc->IsIntegralConst(-1)))
+                else if (data->OperGet() == GT_ADD && (rmwSrc->IsIntegralConst(1) || rmwSrc->IsIntegralConst(-1)))
                 {
                     // Generate "inc/dec [mem]" instead of "add/sub [mem], 1".
                     //