[Ada] Fix stack alignment issue in the signal trampoline on QNX

The stack on AArch64 is 128-bit aligned to allow Neon and FPU operations.

2018-05-22  Jerome Lambourg  <lambourg@adacore.com>

gcc/ada/

	* sigtramp-qnx.c: Fix stack alignment issue in the signal trampoline.

From-SVN: r260512

diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index aae611c..c8e4d4d 100644 (file)
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,7 @@
+2018-05-22  Jerome Lambourg  <lambourg@adacore.com>
+
+       * sigtramp-qnx.c: Fix stack alignment issue in the signal trampoline.
+
 2018-05-22  Ed Schonberg  <schonberg@adacore.com>
 
        * freeze.adb (Freeze_Fixed_Point_Type): If the first subtype has

diff --git a/gcc/ada/sigtramp-qnx.c b/gcc/ada/sigtramp-qnx.c
index 23f14e5..1a9b616 100644 (file)
--- a/gcc/ada/sigtramp-qnx.c
+++ b/gcc/ada/sigtramp-qnx.c
@@ -215,17 +215,18 @@ TCR("ret")
 #define SIGTRAMP_BODY \
   CFI_DEF_CFA \
   CFI_COMMON_REGS \
-  TCR("# Push FP and LR on stack") \
-  TCR("stp x29, x30, [sp, #-16]!") \
+  TCR("# Allocate the frame (16bytes aligned) and push FP and LR") \
+  TCR("stp x29, x30, [sp, #-32]!") \
+  TCR("add x29, sp, 0") \
   TCR("# Push register used to hold the CFA on stack") \
-  TCR("str x" S(CFA_REG) ", [sp, #-8]!")  \
+  TCR("str x" S(CFA_REG) ", [sp, 16]")  \
   TCR("# Set the CFA: x2 value") \
   TCR("mov x" S(CFA_REG) ", x2") \
   TCR("# Call the handler") \
   TCR("blr x3") \
   TCR("# Release our frame and return (should never get here!).") \
-  TCR("ldr x" S(CFA_REG) " , [sp], 8") \
-  TCR("ldp x29, x30, [sp], 16") \
+  TCR("ldr x" S(CFA_REG) ", [sp, 16]") \
+  TCR("ldp x29, x30, [sp], 32") \
   TCR("ret")
 
 #endif /* AARCH64 */