cl::desc("Comma separated list of debug counter skip and count"),
cl::CommaSeparated, cl::ZeroOrMore, cl::location(DebugCounter::instance()));
+static cl::opt<bool> PrintDebugCounter(
+ "print-debug-counter", cl::Hidden, cl::init(false), cl::Optional,
+ cl::desc("Print out debug counter info after all counters accumulated"));
+
static ManagedStatic<DebugCounter> DC;
+// Print information when destroyed, iff command line option is specified.
+DebugCounter::~DebugCounter() {
+ if (isCountingEnabled() && PrintDebugCounter)
+ print(dbgs());
+}
+
DebugCounter &DebugCounter::instance() { return *DC; }
// This is called by the command line parser when it sees a value for the
}
void DebugCounter::print(raw_ostream &OS) const {
+ SmallVector<StringRef, 16> CounterNames(RegisteredCounters.begin(),
+ RegisteredCounters.end());
+ sort(CounterNames.begin(), CounterNames.end());
+
+ auto &Us = instance();
OS << "Counters and values:\n";
- for (const auto &KV : Counters)
- OS << left_justify(RegisteredCounters[KV.first], 32) << ": {"
- << KV.second.Count << "," << KV.second.Skip << ","
- << KV.second.StopAfter << "}\n";
+ for (auto &CounterName : CounterNames) {
+ unsigned CounterID = getCounterId(CounterName);
+ OS << left_justify(RegisteredCounters[CounterID], 32) << ": {"
+ << Us.Counters[CounterID].Count << "," << Us.Counters[CounterID].Skip
+ << "," << Us.Counters[CounterID].StopAfter << "}\n";
+ }
}
LLVM_DUMP_METHOD void DebugCounter::dump() const {
--- /dev/null
+; RUN: opt -S -debug-counter=early-cse-skip=1,early-cse-count=1 -early-cse \
+; RUN: -debug-counter=newgvn-vn-skip=1,newgvn-vn-count=2 -newgvn \
+; RUN: -instcombine -print-debug-counter < %s 2>&1 | FileCheck %s
+;; Test debug counter prints correct info in right order.
+; CHECK-LABEL: Counters and values:
+; CHECK: early-cse
+; CHECK-SAME: {4,1,1}
+; CHECK: instcombine-visit
+; CHECK-SAME: {12,0,-1}
+; CHECK: newgvn-vn
+; CHECK-SAME: {9,1,2}
+define i32 @f1(i32 %a, i32 %b) {
+bb:
+ %add1 = add i32 %a, %b
+ %add2 = add i32 %a, %b
+ %add3 = add i32 %a, %b
+ %add4 = add i32 %a, %b
+ %ret1 = add i32 %add1, %add2
+ %ret2 = add i32 %add3, %add4
+ %ret = add i32 %ret1, %ret2
+ ret i32 %ret
+}
+
+define i32 @f2(i32 %a, i32 %b) {
+bb:
+ %add1 = add i32 %a, %b
+ %add2 = add i32 %a, %b
+ %ret = add i32 %add1, %add2
+ ret i32 %ret
+}