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[X86] AND, OR, and XOR of vectors are always legal no need to set them legal explicitly.
author
Craig Topper
<craig.topper@gmail.com>
Fri, 15 Apr 2016 06:20:14 +0000
(06:20 +0000)
committer
Craig Topper
<craig.topper@gmail.com>
Fri, 15 Apr 2016 06:20:14 +0000
(06:20 +0000)
llvm-svn: 266412
llvm/lib/Target/X86/X86ISelLowering.cpp
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diff --git
a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index
eb9e31c
..
61e4846
100644
(file)
--- a/
llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/
llvm/lib/Target/X86/X86ISelLowering.cpp
@@
-1465,11
+1465,6
@@
X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
// Custom lower several nodes.
for (MVT VT : MVT::vector_valuetypes()) {
unsigned EltSize = VT.getVectorElementType().getSizeInBits();
- if (EltSize == 1) {
- setOperationAction(ISD::AND, VT, Legal);
- setOperationAction(ISD::OR, VT, Legal);
- setOperationAction(ISD::XOR, VT, Legal);
- }
if ((VT.is128BitVector() || VT.is256BitVector()) && EltSize >= 32) {
setOperationAction(ISD::MGATHER, VT, Custom);
setOperationAction(ISD::MSCATTER, VT, Custom);