arm64: dts: renesas: r9a07g044: Add I2C nodes

Add I2C{0,1,2,3} nodes to RZ/G2L (R9A07G044) SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210626081344.5783-11-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 01482d2..9a7489d 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -89,6 +89,86 @@
                        status = "disabled";
                };
 
+               i2c0: i2c@10058000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+                       reg = <0 0x10058000 0 0x400>;
+                       interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 348 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 349 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G044_I2C0_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A07G044_I2C0_MRST>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@10058400 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+                       reg = <0 0x10058400 0 0x400>;
+                       interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 356 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 357 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G044_I2C1_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A07G044_I2C1_MRST>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@10058800 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+                       reg = <0 0x10058800 0 0x400>;
+                       interrupts = <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G044_I2C2_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A07G044_I2C2_MRST>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@10058c00 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "renesas,riic-r9a07g044", "renesas,riic-rz";
+                       reg = <0 0x10058c00 0 0x400>;
+                       interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 372 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G044_I2C3_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A07G044_I2C3_MRST>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
+               };
+
                cpg: clock-controller@11010000 {
                        compatible = "renesas,r9a07g044-cpg";
                        reg = <0 0x11010000 0 0x10000>;