if (GFX_VER == 11)
ps.SamplerCount = 0;
- if (prog_data) {
- intel_set_ps_dispatch_state(&ps, devinfo, prog_data,
- params->num_samples);
-
- ps.DispatchGRFStartRegisterForConstantSetupData0 =
- brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);
- ps.DispatchGRFStartRegisterForConstantSetupData1 =
- brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 1);
- ps.DispatchGRFStartRegisterForConstantSetupData2 =
- brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 2);
-
- ps.KernelStartPointer0 = params->wm_prog_kernel +
- brw_wm_prog_data_prog_offset(prog_data, ps, 0);
- ps.KernelStartPointer1 = params->wm_prog_kernel +
- brw_wm_prog_data_prog_offset(prog_data, ps, 1);
- ps.KernelStartPointer2 = params->wm_prog_kernel +
- brw_wm_prog_data_prog_offset(prog_data, ps, 2);
- }
-
/* 3DSTATE_PS expects the number of threads per PSD, which is always 64
* for pre Gfx11 and 128 for gfx11+; On gfx11+ If a programmed value is
* k, it implies 2(k+1) threads. It implicitly scales for different GT
default:
unreachable("Invalid fast clear op");
}
+
+ if (prog_data) {
+ intel_set_ps_dispatch_state(&ps, devinfo, prog_data,
+ params->num_samples);
+
+ ps.DispatchGRFStartRegisterForConstantSetupData0 =
+ brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 0);
+ ps.DispatchGRFStartRegisterForConstantSetupData1 =
+ brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 1);
+ ps.DispatchGRFStartRegisterForConstantSetupData2 =
+ brw_wm_prog_data_dispatch_grf_start_reg(prog_data, ps, 2);
+
+ ps.KernelStartPointer0 = params->wm_prog_kernel +
+ brw_wm_prog_data_prog_offset(prog_data, ps, 0);
+ ps.KernelStartPointer1 = params->wm_prog_kernel +
+ brw_wm_prog_data_prog_offset(prog_data, ps, 1);
+ ps.KernelStartPointer2 = params->wm_prog_kernel +
+ brw_wm_prog_data_prog_offset(prog_data, ps, 2);
+ }
}
blorp_emit(batch, GENX(3DSTATE_PS_EXTRA), psx) {
bool enable_16 = prog_data->dispatch_16;
bool enable_32 = prog_data->dispatch_32;
+#if GFX_VER >= 9
+ /* SKL PRMs, Volume 2a: Command Reference: Instructions:
+ * 3DSTATE_PS_BODY::8 Pixel Dispatch Enable:
+ *
+ * "When Render Target Fast Clear Enable is ENABLED or Render Target
+ * Resolve Type = RESOLVE_PARTIAL or RESOLVE_FULL, this bit must be
+ * DISABLED."
+ */
+ if (ps->RenderTargetFastClearEnable ||
+ ps->RenderTargetResolveType == RESOLVE_PARTIAL ||
+ ps->RenderTargetResolveType == RESOLVE_FULL)
+ enable_8 = false;
+#elif GFX_VER >= 8
+ /* BDW has the same wording as SKL, except some of the fields mentioned
+ * don't exist...
+ */
+ if (ps->RenderTargetFastClearEnable ||
+ ps->RenderTargetResolveEnable)
+ enable_8 = false;
+#endif
+
if (prog_data->persample_dispatch) {
/* TGL PRMs, Volume 2d: Command Reference: Structures:
* 3DSTATE_PS_BODY::32 Pixel Dispatch Enable: