#include <linux/sched.h>
#include <asm/processor.h>
+#include <asm/cpufeature.h>
#include <asm/special_insns.h>
+ static inline void __invpcid(unsigned long pcid, unsigned long addr,
+ unsigned long type)
+ {
+ struct { u64 d[2]; } desc = { { pcid, addr } };
+
+ /*
+ * The memory clobber is because the whole point is to invalidate
+ * stale TLB entries and, especially if we're flushing global
+ * mappings, we don't want the compiler to reorder any subsequent
+ * memory accesses before the TLB flush.
+ *
+ * The hex opcode is invpcid (%ecx), %eax in 32-bit mode and
+ * invpcid (%rcx), %rax in long mode.
+ */
+ asm volatile (".byte 0x66, 0x0f, 0x38, 0x82, 0x01"
+ : : "m" (desc), "a" (type), "c" (&desc) : "memory");
+ }
+
+ #define INVPCID_TYPE_INDIV_ADDR 0
+ #define INVPCID_TYPE_SINGLE_CTXT 1
+ #define INVPCID_TYPE_ALL_INCL_GLOBAL 2
+ #define INVPCID_TYPE_ALL_NON_GLOBAL 3
+
+ /* Flush all mappings for a given pcid and addr, not including globals. */
+ static inline void invpcid_flush_one(unsigned long pcid,
+ unsigned long addr)
+ {
+ __invpcid(pcid, addr, INVPCID_TYPE_INDIV_ADDR);
+ }
+
+ /* Flush all mappings for a given PCID, not including globals. */
+ static inline void invpcid_flush_single_context(unsigned long pcid)
+ {
+ __invpcid(pcid, 0, INVPCID_TYPE_SINGLE_CTXT);
+ }
+
+ /* Flush all mappings, including globals, for all PCIDs. */
+ static inline void invpcid_flush_all(void)
+ {
+ __invpcid(0, 0, INVPCID_TYPE_ALL_INCL_GLOBAL);
+ }
+
+ /* Flush all mappings for all PCIDs except globals. */
+ static inline void invpcid_flush_all_nonglobals(void)
+ {
+ __invpcid(0, 0, INVPCID_TYPE_ALL_NON_GLOBAL);
+ }
+
#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#else