Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInst
authorKevin Enderby <enderby@apple.com>
Thu, 29 Nov 2012 23:47:11 +0000 (23:47 +0000)
committerKevin Enderby <enderby@apple.com>
Thu, 29 Nov 2012 23:47:11 +0000 (23:47 +0000)
which would then cause an assert when printed.  rdar://11437956

llvm-svn: 168960

llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/test/MC/Disassembler/ARM/unpredictable-BFI.txt [new file with mode: 0644]

index f00142d..5de50d5 100644 (file)
@@ -1281,7 +1281,13 @@ static DecodeStatus DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val,
   unsigned lsb = fieldFromInstruction(Val, 0, 5);
 
   DecodeStatus S = MCDisassembler::Success;
-  if (lsb > msb) Check(S, MCDisassembler::SoftFail);
+  if (lsb > msb) {
+    Check(S, MCDisassembler::SoftFail);
+    // The check above will cause the warning for the "potentially undefined
+    // instruction encoding" but we can't build a bad MCOperand value here
+    // with a lsb > msb or else printing the MCInst will cause a crash.
+    lsb = msb;
+  }
 
   uint32_t msb_mask = 0xFFFFFFFF;
   if (msb != 31) msb_mask = (1U << (msb+1)) - 1;
diff --git a/llvm/test/MC/Disassembler/ARM/unpredictable-BFI.txt b/llvm/test/MC/Disassembler/ARM/unpredictable-BFI.txt
new file mode 100644 (file)
index 0000000..a98f859
--- /dev/null
@@ -0,0 +1,11 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 | FileCheck %s
+
+# rdar://11437956
+
+# CHECK: warning: invalid instruction encoding
+# CHECK: 0x90 0x00 0xc0 0xe7
+0x90 0x00 0xc0 0xe7
+
+# CHECK: warning: invalid instruction encoding
+# CHECK: 0x90 0x01 0xc0 0xe7
+0x90 0x01 0xc0 0xe7