drm/amdgpu: avoid soft lockup when waiting for RLC serdes (v2)
authorpding <Pixel.Ding@amd.com>
Mon, 23 Oct 2017 08:31:04 +0000 (16:31 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 4 Dec 2017 21:33:13 +0000 (16:33 -0500)
Normally all waiting get timeout if there's one.
Release the lock and return immediately when timeout happens.

v2:
 - set the se_sh to broadcase before return

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: pding <Pixel.Ding@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index 9f93e05..46ee743 100644 (file)
@@ -3851,6 +3851,14 @@ static void gfx_v8_0_wait_for_rlc_serdes(struct amdgpu_device *adev)
                                        break;
                                udelay(1);
                        }
+                       if (k == adev->usec_timeout) {
+                               gfx_v8_0_select_se_sh(adev, 0xffffffff,
+                                                     0xffffffff, 0xffffffff);
+                               mutex_unlock(&adev->grbm_idx_mutex);
+                               DRM_INFO("Timeout wait for RLC serdes %u,%u\n",
+                                        i, j);
+                               return;
+                       }
                }
        }
        gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
index a5811e8..46a0d3e 100644 (file)
@@ -1645,6 +1645,14 @@ static void gfx_v9_0_wait_for_rlc_serdes(struct amdgpu_device *adev)
                                        break;
                                udelay(1);
                        }
+                       if (k == adev->usec_timeout) {
+                               gfx_v9_0_select_se_sh(adev, 0xffffffff,
+                                                     0xffffffff, 0xffffffff);
+                               mutex_unlock(&adev->grbm_idx_mutex);
+                               DRM_INFO("Timeout wait for RLC serdes %u,%u\n",
+                                        i, j);
+                               return;
+                       }
                }
        }
        gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);