dts: support 32bit for gxl_p230 [1/1]
authorJianxiong Pan <jianxiong.pan@amlogic.com>
Mon, 29 Oct 2018 08:25:21 +0000 (16:25 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 5 Nov 2018 01:57:47 +0000 (18:57 -0700)
PD#SWPL-1116

Problem:
add support 32bit for gxl_p230.

Solution:
add 32bit dts for gxl_p230.

Verify:
gxl_p230

Change-Id: Icc62c45e7bd36e8248ad0bb11a67a0151cf7ea34
Signed-off-by: Jianxiong Pan <jianxiong.pan@amlogic.com>
arch/arm/boot/dts/amlogic/gxl_p230_2g.dts [new file with mode: 0644]
arch/arm/boot/dts/amlogic/partition_mbox_ab.dtsi [new file with mode: 0644]

diff --git a/arch/arm/boot/dts/amlogic/gxl_p230_2g.dts b/arch/arm/boot/dts/amlogic/gxl_p230_2g.dts
new file mode 100644 (file)
index 0000000..3dc6b4f
--- /dev/null
@@ -0,0 +1,1343 @@
+/*
+ * arch/arm/boot/dts/amlogic/gxl_p230_2g.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "mesongxl.dtsi"
+#include "partition_mbox_ab.dtsi"
+/ {
+       model = "Amlogic";
+       amlogic-dt-id = "gxl_p230_2g";
+       compatible = "amlogic,gxl";
+       interrupt-parent = <&gic>;
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       aliases {
+               serial0 = &uart_AO;
+               serial1 = &uart_A;
+               serial2 = &uart_B;
+               serial3 = &uart_C;
+               serial4 = &uart_AO_B;
+       };
+
+       ion_dev {
+               compatible = "amlogic, ion_dev";
+               memory-region = <&ion_reserved>;
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               linux,usable-memory = <0x0100000 0x7ff00000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               /* global autoconfigured region for contiguous allocations */
+               ramoops@0x07400000 {
+                       compatible = "ramoops";
+                       reg = <0x07400000 0x00100000>;
+                       record-size = <0x8000>;
+                       console-size = <0x8000>;
+                       ftrace-size = <0x0>;
+                       pmsg-size = <0x8000>;
+               };
+               secmon_reserved:linux,secmon {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x400000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x05000000 0x400000>;
+               };
+               secos_reserved:linux,secos {
+                       status = "disable";
+                       compatible = "amlogic, aml_secos_memory";
+                       reg = <0x05300000 0x2000000>;
+                       no-map;
+               };
+               logo_reserved:linux,meson-fb {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x800000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x7f800000 0x800000>;
+               };
+               //don't put other dts in front of logo_reserved
+
+               //di_reserved:linux,di {
+               //      compatible = "amlogic, di-mem";
+                       /** 10x3133440=30M(0x1e) support 8bit **/
+               //      size = <0x1e00000>;
+                       //no-map;
+               //};
+               di_cma_reserved:linux,di_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /** 10x3133440=30M(0x1e) support 8bit **/
+                       size = <0x2000000>;
+                       alignment = <0x400000>;
+               };
+               ion_reserved:linux,ion-dev {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x7C00000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x0 0x2ee00000>;
+               };
+
+               /*  vdin0 CMA pool */
+               //vdin0_cma_reserved:linux,vdin0_cma {
+               //      compatible = "shared-dma-pool";
+               //      linux,phandle = <4>;
+               //      reusable;
+               /* 1920x1080x2x4  =16+4 M */
+               //      size = <0x01400000>;
+               //      alignment = <0x400000>;
+               //};
+               /*  vdin1 CMA pool */
+               vdin1_cma_reserved:linux,vdin1_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 1920x1080x2x4  =16 M */
+                       size = <0x01000000>;
+                       alignment = <0x400000>;
+               };
+               /*  POST PROCESS MANAGER */
+               ppmgr_reserved:linux,ppmgr {
+                       compatible = "shared-dma-pool";
+                       size = <0x0>;
+               };
+
+               codec_mm_cma:linux,codec_mm_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* ion_codec_mm max can alloc size 80M*/
+                       size = <0x13400000>;
+                       alignment = <0x400000>;
+                       linux,contiguous-region;
+                       alloc-ranges = <0x12000000 0x13400000>;
+               };
+               picdec_cma_reserved:linux,picdec {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0>;
+                       alignment = <0x0>;
+                       linux,contiguous-region;
+               };
+               /* codec shared reserved */
+               codec_mm_reserved:linux,codec_mm_reserved {
+                       compatible = "amlogic, codec-mm-reserved";
+                       size = <0x0>;
+                       alignment = <0x100000>;
+                       //no-map;
+               };
+       };
+       bt-dev{
+               compatible = "amlogic, bt-dev";
+               dev_name = "bt-dev";
+               status = "okay";
+               gpio_reset = <&gpio       GPIOX_17       GPIO_ACTIVE_HIGH>;
+       };
+       wifi{
+               compatible = "amlogic, aml_wifi";
+               dev_name = "aml_wifi";
+               status = "okay";
+               interrupt_pin = <&gpio       GPIOX_7       GPIO_ACTIVE_HIGH>;
+               irq_trigger_type = "GPIO_IRQ_LOW";
+               power_on_pin = <&gpio       GPIOX_6       GPIO_ACTIVE_HIGH>;
+               //if use bcm wifi, config dhd_static_buf and 32k as bellow
+               dhd_static_buf;
+               pinctrl-names = "default";
+               pinctrl-0 = <&wifi_32k_pins>;
+               pwm_config = <&wifi_pwm_conf>;
+       };
+
+       wifi_pwm_conf:wifi_pwm_conf{
+               pwm_channel1_conf {
+                       pwms = <&pwm_ef MESON_PWM_0 30040 0>;
+                       duty-cycle = <15020>;
+                       times = <8>;
+               };
+               pwm_channel2_conf {
+                       pwms = <&pwm_ef MESON_PWM_2 30030 0>;
+                       duty-cycle = <15015>;
+                       times = <12>;
+               };
+       };
+
+       sd_emmc_c: emmc@d0074000 {
+               status = "okay";
+               compatible = "amlogic, meson-mmc-gxl";
+               reg = <0xd0074000 0x2000>;
+               interrupts = <0 218 1>;
+               pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
+               pinctrl-0 = <&emmc_clk_cmd_pins>;
+               pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>;
+               clocks = <&clkc CLKID_SD_EMMC_C>,
+                          <&clkc CLKID_SD_EMMC_C_P0_COMP>,
+                          <&clkc CLKID_FCLK_DIV2>;
+               clock-names = "core", "clkin0", "clkin1";
+
+               bus-width = <8>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               mmc-ddr-1_8v;
+               mmc-hs200-1_8v;
+
+               max-frequency = <200000000>;
+               non-removable;
+               disable-wp;
+               emmc {
+                       pinname = "emmc";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       caps = "MMC_CAP_8_BIT_DATA",
+                                "MMC_CAP_MMC_HIGHSPEED",
+                                "MMC_CAP_SD_HIGHSPEED",
+                                "MMC_CAP_NONREMOVABLE",
+                                "MMC_CAP_1_8V_DDR",
+                                "MMC_CAP_HW_RESET",
+                                "MMC_CAP_ERASE",
+                                "MMC_CAP_CMD23";
+                       caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+                       f_min = <400000>;
+                       f_max = <100000000>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
+                       hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
+                       card_type = <1>;
+                       /* 1:mmc card(include eMMC),
+                        * 2:sd card(include tSD)
+                        */
+               };
+       };
+
+       sd_emmc_b:sd@d0072000 {
+               status = "okay";
+               compatible = "amlogic, meson-mmc-gxl";
+               reg = <0xd0072000 0x2000>;
+               interrupts = <0 217 1>;
+               pinctrl-names = "sd_all_pins",
+                       "sd_clk_cmd_pins",
+                       "sd_1bit_pins",
+                       "sd_clk_cmd_uart_pins",
+                       "sd_1bit_uart_pins",
+                       "sd_to_ao_uart_pins",
+                       "ao_to_sd_uart_pins",
+                       "ao_to_sd_jtag_pins",
+                       "sd_to_ao_jtag_pins";
+               pinctrl-0 = <&sd_all_pins>;
+               pinctrl-1 = <&sd_clk_cmd_pins>;
+               pinctrl-2 = <&sd_1bit_pins>;
+               pinctrl-3 = <&sd_to_ao_uart_clr_pins
+                       &sd_clk_cmd_pins &ao_to_sd_uart_pins>;
+               pinctrl-4 = <&sd_to_ao_uart_clr_pins
+                       &sd_1bit_pins &ao_to_sd_uart_pins>;
+               pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
+               pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+               pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
+               pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
+               clocks = <&clkc CLKID_SD_EMMC_B>,
+                          <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+                          <&clkc CLKID_FCLK_DIV2>;
+               clock-names = "core", "clkin0", "clkin1";
+
+               bus-width = <4>;
+               cap-sd-highspeed;
+               max-frequency = <100000000>;
+               disable-wp;
+               sd {
+                       pinname = "sd";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       caps = "MMC_CAP_4_BIT_DATA",
+                                "MMC_CAP_MMC_HIGHSPEED",
+                                "MMC_CAP_SD_HIGHSPEED";
+                       /* "MMC_CAP_UHS_SDR12",
+                        * "MMC_CAP_UHS_SDR25",
+                        * "MMC_CAP_UHS_SDR50",
+                        * "MMC_CAP_UHS_SDR104";
+                        */
+                       f_min = <400000>;
+                       f_max = <100000000>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
+                       jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
+                       gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
+                       card_type = <5>;
+                       /* 0:unknown,
+                        * 1:mmc card(include eMMC),
+                        * 2:sd card(include tSD),
+                        * 3:sdio device(ie:sdio-wifi),
+                        * 4:SD combo (IO+mem) card,
+                        * 5:NON sdio device(means sd/mmc card),
+                        * other:reserved
+                        */
+               };
+       };
+
+       sd_emmc_a:sdio@d0070000 {
+               status = "okay";
+               compatible = "amlogic, meson-mmc-gxl";
+               reg = <0xd0070000 0x2000>;
+               interrupts = <0 216 4>;
+               pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins";
+               pinctrl-0 = <&sdio_clk_cmd_pins>;
+               pinctrl-1 = <&sdio_all_pins>;
+               clocks = <&clkc CLKID_SD_EMMC_A>,
+                          <&clkc CLKID_SD_EMMC_A_P0_COMP>,
+                          <&clkc CLKID_FCLK_DIV2>;
+               clock-names = "core", "clkin0", "clkin1";
+
+               bus-width = <4>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               max-frequency = <100000000>;
+               non-removable;
+               disable-wp;
+               sdio {
+                       pinname = "sdio";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       caps = "MMC_CAP_4_BIT_DATA",
+                                "MMC_CAP_MMC_HIGHSPEED",
+                                "MMC_CAP_SD_HIGHSPEED",
+                                "MMC_CAP_NONREMOVABLE",
+                                "MMC_CAP_UHS_SDR12",
+                                "MMC_CAP_UHS_SDR25",
+                                "MMC_CAP_UHS_SDR50",
+                                "MMC_CAP_UHS_SDR104",
+                                "MMC_PM_KEEP_POWER",
+                                "MMC_CAP_SDIO_IRQ";
+                       f_min = <400000>;
+                       f_max = <200000000>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       card_type = <3>;
+                       /* 3:sdio device(ie:sdio-wifi),
+                        * 4:SD combo (IO+mem) card
+                        */
+               };
+       };
+       mtd_nand{
+               compatible = "amlogic, aml_mtd_nand";
+               dev_name = "mtdnand";
+               status = "disabled";
+               reg = <0xd0074800 0x200>;
+               interrupts = <  0 34 1 >;
+               pinctrl-names = "nand_rb_mod","nand_norb_mod", "nand_cs_only";
+               pinctrl-0 = <&all_nand_pins>;
+               pinctrl-1 = <&all_nand_pins>;
+               pinctrl-2 = <&nand_cs_pins>;
+               device_id = <0>;
+               plat-names = "bootloader","nandnormal";
+               plat-num = <2>;
+               plat-part-0 = <&bootloader>;
+               plat-part-1 = <&nandnormal>;
+               bootloader: bootloader{
+                       enable_pad ="ce0";
+                       busy_pad = "rb0";
+                       timming_mode = "mode5";
+                       bch_mode = "bch60_1k";
+                       t_rea = <20>;
+                       t_rhoh = <15>;
+                       chip_num = <1>;
+                       part_num = <0>;
+                       rb_detect = <1>;
+               };
+               nandnormal: nandnormal{
+                       enable_pad ="ce0","ce1";
+                       busy_pad = "rb0","rb1";
+                       timming_mode = "mode5";
+                       bch_mode = "bch60_1k";
+                       plane_mode = "twoplane";
+                       t_rea = <20>;
+                       t_rhoh = <15>;
+                       chip_num = <2>;
+                       part_num = <3>;
+                       partition = <&nand_partitions>;
+                       rb_detect = <1>;
+               };
+               nand_partitions:nand_partition{
+                       boot{
+                               offset=<0x0 0x300000>;
+                               size=<0x0 0x800000>;
+                       };
+                       /*
+                        *recovery{
+                        *      offset=<0x0 0xB00000>;
+                        *      size=<0x0 0xA00000>;
+                        *};
+                        */
+                       upgrade{
+                               offset=<0x0 0xB00000>;
+                               size=<0x0 0x5800000>;
+                       };
+                       data{
+                               offset=<0xffffffff 0xffffffff>;
+                               size=<0x0 0x0>;
+                       };
+               };
+       };
+
+       ethmac: ethernet@0xc9410000 {
+                       compatible = "amlogic, gxbb-eth-dwmac";
+                       reg = <0xc9410000 0x10000
+                       0xc8834540 0x8
+                       0xc8834558 0xc>;
+                       interrupts = <0 8 1>;
+                       pinctrl-names = "external_eth_pins";
+                       pinctrl-0 = <&external_eth_pins>;
+                       rst_pin-gpios = <&gpio GPIOZ_14 0>;
+                       GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>;
+                       GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>;
+                       mc_val_internal_phy = <0x1800>;
+                       mc_val_external_phy = <0x1621>;
+                       cali_val = <0x20000>;
+                       interrupt-names = "macirq";
+                       clocks = <&clkc CLKID_ETH>;
+                       clock-names = "ethclk81";
+                       internal_phy=<0>;
+       };
+
+       codec_io {
+               compatible = "amlogic, codec_io";
+               #address-cells=<1>;
+               #size-cells=<1>;
+               ranges;
+               io_cbus_base{
+                       reg = <0xC1100000 0x100000>;
+               };
+               io_dos_base{
+                       reg = <0xc8820000 0x10000>;
+               };
+               io_hiubus_base{
+                       reg = <0xc883c000 0x2000>;
+               };
+               io_aobus_base{
+                       reg = <0xc8100000 0x100000>;
+               };
+               io_vcbus_base{
+                       reg = <0xd0100000 0x40000>;
+               };
+               io_dmc_base{
+                       reg = <0xc8838000 0x400>;
+               };
+       };
+
+       codec_mm {
+               compatible = "amlogic, codec, mm";
+               memory-region = <&codec_mm_cma &codec_mm_reserved>;
+               dev_name = "codec_mm";
+               status = "okay";
+       };
+
+       canvas{
+               compatible = "amlogic, meson, canvas";
+               dev_name = "amlogic-canvas";
+               status = "ok";
+               reg = <0xc8838000 0x400>;
+       };
+
+       mesonstream {
+               compatible = "amlogic, codec, streambuf";
+               dev_name = "mesonstream";
+               status = "okay";
+               clocks = <&clkc CLKID_DOS_PARSER
+                       &clkc CLKID_DEMUX
+                       &clkc CLKID_DOS
+                       &clkc CLKID_CLK81
+                       &clkc CLKID_VDEC_MUX
+                       &clkc CLKID_HCODEC_MUX
+                       &clkc CLKID_HEVC_MUX>;
+               clock-names = "parser_top",
+                       "demux",
+                       "vdec",
+                       "clk_81",
+                       "clk_vdec_mux",
+                       "clk_hcodec_mux",
+                       "clk_hevc_mux";
+       };
+
+       vdec {
+               compatible = "amlogic, vdec";
+               dev_name = "vdec.0";
+               status = "okay";
+               interrupts = <0 3 1
+                       0 23 1
+                       0 32 1
+                       0 43 1
+                       0 44 1
+                       0 45 1>;
+               interrupt-names = "vsync",
+                       "demux",
+                       "parser",
+                       "mailbox_0",
+                       "mailbox_1",
+                       "mailbox_2";
+       };
+
+       gpio_keypad{
+               compatible = "amlogic, gpio_keypad";
+               status = "okay";
+               scan_period = <20>;
+               key_num = <1>;
+               key_name = "power";
+               key_code = <116>;
+               irq_keyup = <6>;
+               irq_keydown = <7>;
+               key-gpios = <&gpio_ao  GPIOAO_2  GPIO_ACTIVE_HIGH>;
+               detect_mode = <0>;/*0:polling mode, 1:irq mode*/
+       };
+
+
+       aml_sensor0: aml-sensor@0 {
+               compatible = "amlogic, aml-thermal";
+               device_name = "thermal";
+               #thermal-sensor-cells = <1>;
+               cooling_devices {
+                       cpufreq_cool_cluster0 {
+                               min_state = <1000000>;
+                               dyn_coeff = <140>;
+                               cluster_id = <0>;
+                               node_name = "cpufreq_cool0";
+                               device_type = "cpufreq";
+                       };
+                       cpucore_cool_cluster0 {
+                               min_state = <1>;
+                               dyn_coeff = <0>;
+                               cluster_id = <0>;
+                               node_name = "cpucore_cool0";
+                               device_type = "cpucore";
+                       };
+                       gpufreq_cool {
+                               min_state = <400>;
+                               dyn_coeff = <437>;
+                               cluster_id = <0>;
+                               node_name = "gpufreq_cool0";
+                               device_type = "gpufreq";
+                       };
+                       gpucore_cool {
+                               min_state = <1>;
+                               dyn_coeff = <0>;
+                               cluster_id = <0>;
+                               node_name = "gpucore_cool0";
+                               device_type = "gpucore";
+                       };
+               };
+               cpufreq_cool0:cpufreq_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               cpucore_cool0:cpucore_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               gpufreq_cool0:gpufreq_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               gpucore_cool0:gpucore_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+       };
+       thermal-zones {
+               soc_thermal {
+                       polling-delay = <1000>;
+                       polling-delay-passive = <100>;
+                       sustainable-power = <2150>;
+
+                       thermal-sensors = <&aml_sensor0 3>;
+
+                       trips {
+                               switch_on: trip-point@0 {
+                                       temperature = <70000>;
+                                       hysteresis = <1000>;
+                                       type = "passive";
+                               };
+                               control: trip-point@1 {
+                                       temperature = <80000>;
+                                       hysteresis = <1000>;
+                                       type = "passive";
+                               };
+                               hot: trip-point@2 {
+                                       temperature = <85000>;
+                                       hysteresis = <5000>;
+                                       type = "hot";
+                               };
+                               critical: trip-point@3 {
+                                       temperature = <260000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+
+                       cooling-maps {
+                               cpufreq_cooling_map {
+                                       trip = <&control>;
+                                       cooling-device = <&cpufreq_cool0 0 4>;
+                                       contribution = <1024>;
+                               };
+                               cpucore_cooling_map {
+                                       trip = <&control>;
+                                       cooling-device = <&cpucore_cool0 0 3>;
+                                       contribution = <1024>;
+                               };
+                               gpufreq_cooling_map {
+                                       trip = <&control>;
+                                       cooling-device = <&gpufreq_cool0 0 4>;
+                                       contribution = <1024>;
+                               };
+                               gpucore_cooling_map {
+                                       trip = <&control>;
+                                       cooling-device = <&gpucore_cool0 0 2>;
+                                       contribution = <1024>;
+                               };
+                       };
+               };
+       };
+
+       dwc3: dwc3@c9000000 {
+               compatible = "synopsys, dwc3";
+               reg = <0xc9000000 0x100000>;
+               interrupts = <0 30 4>;
+               usb-phy = <&usb2_phy>, <&usb3_phy>;
+               cpu-type = "gxl";
+               clock-src = "usb3.0";
+       };
+
+       usb2_phy: usb2phy@d0078000 {
+               compatible = "amlogic, amlogic-new-usb2";
+               portnum = <3>;
+               reg = <0xd0078000 0x80
+                                       0xc1104408 0x4>;
+       };
+
+       usb3_phy: usb3phy@d0078080 {
+               compatible = "amlogic, amlogic-new-usb3";
+               portnum = <0>;
+               reg = <0xd0078080 0x20>;
+       };
+
+       dwc2_a {
+               compatible = "amlogic, dwc2";
+               device_name = "dwc2_a";
+               reg = <0xc9100000 0x40000>;
+               status = "okay";
+               interrupts = <0 31 4>;
+               pl-periph-id = <0>; /** lm name */
+               clock-src = "usb0"; /** clock src */
+               port-id = <0>;  /** ref to mach/usb.h */
+               port-type = <2>;        /** 0: otg, 1: host, 2: slave */
+               port-speed = <0>; /** 0: default, high, 1: full */
+               port-config = <0>; /** 0: default */
+               port-dma = <0>; /** 0: default ... 6: disable*/
+               port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/
+               usb-fifo = <728>;
+               cpu-type = "gxl";
+               controller-type = <3>; /** 0: normal,1:host,2:device,3:otg*/
+               phy-reg = <0xd0078000>;
+               phy-reg-size = <0xa0>;
+               clocks = <&clkc CLKID_USB_GENERAL
+                       &clkc CLKID_USB1_TO_DDR
+                       &clkc CLKID_USB1>;
+               clock-names = "usb_general",
+                       "usb1",
+                       "usb1_to_ddr";
+               };
+
+       meson-amvideom {
+               compatible = "amlogic, amvideom";
+               dev_name = "amvideom";
+               status = "okay";
+               interrupts = <0 3 1>;
+               interrupt-names = "vsync";
+       };
+
+       vout {
+               compatible = "amlogic, vout";
+               dev_name = "vout";
+               status = "okay";
+               fr_auto_policy = <0>;
+       };
+
+       cvbsout {
+               compatible = "amlogic, cvbsout-gxl";
+               dev_name = "cvbsout";
+               status = "okay";
+               clocks = <&clkc CLKID_VCLK2_ENCI
+                       &clkc CLKID_VCLK2_VENCI0
+                       &clkc CLKID_VCLK2_VENCI1
+                       &clkc CLKID_DAC_CLK>;
+               clock-names = "venci_top_gate",
+                       "venci_0_gate",
+                       "venci_1_gate",
+                       "vdac_clk_gate";
+
+               /* performance: reg_address, reg_value */
+               /* s905d */
+               performance = <0x1bf0  0x9
+                       0x1b56  0x343
+                       0x1b12  0x8080
+                       0x1b05  0xfd
+                       0x1c59  0xf752
+                       0xffff  0x0>; /* ending flag */
+       };
+
+       amhdmitx: amhdmitx{
+               compatible = "amlogic, amhdmitx";
+               dev_name = "amhdmitx";
+               status = "okay";
+               vend-data = <&vend_data>;
+               pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
+               pinctrl-0=<&hdmitx_hpd>;
+               pinctrl-1=<&hdmitx_ddc>;
+               /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
+               interrupts = <0 57 1>;
+               interrupt-names = "hdmitx_hpd";
+               /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM
+                * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD
+                */
+               ic_type = <3>;
+               vend_data: vend_data{ /* Should modified by Customer */
+                       vendor_name = "Amlogic"; /* Max Chars: 8 */
+                       /* standards.ieee.org/develop/regauth/oui/oui.txt */
+                       vendor_id = <0x000000>;
+                       product_desc = "MBox Meson Ref"; /* Max Chars: 16 */
+               };
+       };
+
+       aocec: aocec{
+               compatible = "amlogic, amlogic-aocec";
+               device_name = "aocec";
+               status = "okay";
+               vendor_id = <0x000000>;
+               cec_osd_string = "MBox"; /* Max Chars: 14    */
+               cec_version = <6>; /* 5: 1.4, 6: 2.0 */
+               port_num = <1>;
+               arc_port_mask = <0x0>;
+               interrupts = <0 199 1>;
+               interrupt-names = "hdmi_aocec";
+               pinctrl-names = "default";
+               pinctrl-0=<&hdmitx_aocec>;
+               reg = <0xc810023c 0x4
+                      0xc8100000 0x200>;
+               reg-names = "ao_exit","ao";
+       };
+
+       sysled {
+               compatible = "amlogic, sysled";
+               dev_name = "sysled";
+               status = "disabled";
+               led_gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
+               led_active_low = <1>;
+       };
+
+       meson-fb {
+               compatible = "amlogic, meson-gxl";
+               memory-region = <&logo_reserved>;
+               dev_name = "meson-fb";
+               status = "okay";
+               interrupts = <0 3 1
+                       0 89 1>;
+               interrupt-names = "viu-vsync", "rdma";
+               mem_size = <0x00800000 0x01800000 0x00100000>;
+               /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
+               display_mode_default = "1080p60hz";
+               scale_mode = <1>;
+               /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
+               display_size_default = <1920 1080 1920 3240 32>;
+               /*1920*1080*4*3 = 0x17BB000*/
+               logo_addr = "0x7f800000";
+       };
+       ge2d {
+               compatible = "amlogic, ge2d-gxl";
+               dev_name = "ge2d";
+               status = "okay";
+               interrupts = <0 150 1>;
+               interrupt-names = "ge2d";
+               clocks = <&clkc CLKID_VAPB_MUX>,
+                       <&clkc CLKID_G2D>,
+                       <&clkc CLKID_GE2D_GATE>;
+               clock-names = "clk_vapb_0",
+                       "clk_ge2d",
+                       "clk_ge2d_gate";
+       };
+
+
+       /* AUDIO MESON DEVICES */
+       i2s_dai: I2S {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml-i2s-dai";
+               clocks =
+                       <&clkc CLKID_MPLL2>,
+                       <&clkc CLKID_AMCLK_COMP>,
+                       <&clkc CLKID_AIU_GLUE>,
+                       <&clkc CLKID_IEC958>,
+                       <&clkc CLKID_I2S_OUT>,
+                       <&clkc CLKID_AMCLK>,
+                       <&clkc CLKID_AIFIFO2>,
+                       <&clkc CLKID_MIXER>,
+                       <&clkc CLKID_MIXER_IFACE>,
+                       <&clkc CLKID_ADC>,
+                       <&clkc CLKID_AIU_TOP>,
+                       <&clkc CLKID_AOCLK_GATE>,
+                       <&clkc CLKID_I2S_SPDIF>;
+               clock-names =
+                       "mpll",
+                       "mclk",
+                       "top_glue",
+                       "aud_buf",
+                       "i2s_out",
+                       "amclk_measure",
+                       "aififo2",
+                       "aud_mixer",
+                       "mixer_reg",
+                       "adc",
+                       "top_level",
+                       "aoclk",
+                       "aud_in";
+               i2s_pos_sync = <0>;
+               /*DMIC;*/  /* I2s Mic or Dmic, default for I2S mic */
+       };
+       dmic:snd_dmic {
+               #sound-dai-cells = <0>;
+               compatible = "aml, aml_snd_dmic";
+               reg = <0xd0042000 0x2000>;
+               status = "okay";
+               resets = <
+                       &clkc CLKID_PDM_GATE
+               >;
+               reset-names =   "pdm";
+               pinctrl-names = "audio_dmic";
+               pinctrl-0 = <&aml_dmic_pins>;
+               clocks = <&clkc CLKID_PDM_COMP>,
+                       <&clkc CLKID_AMCLK_COMP>;
+               clock-names = "pdm", "mclk";
+       };
+       spdif_dai: SPDIF {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml-spdif-dai";
+               clocks =
+                       <&clkc CLKID_MPLL1>,
+                       <&clkc CLKID_I958_COMP>,
+                       <&clkc CLKID_AMCLK_COMP>,
+                       <&clkc CLKID_I958_COMP_SPDIF>,
+                       <&clkc CLKID_CLK81>,
+                       <&clkc CLKID_IEC958>,
+                       <&clkc CLKID_IEC958_GATE>;
+               clock-names =
+                       "mpll1",
+                       "i958",
+                       "mclk",
+                       "spdif",
+                       "clk_81",
+                       "iec958",
+                       "iec958_amclk";
+       };
+       pcm_dai: PCM {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml-pcm-dai";
+               pinctrl-names = "audio_pcm";
+               pinctrl-0 = <&audio_pcm_pins>;
+               clocks =
+                       <&clkc CLKID_MPLL0>,
+                       <&clkc CLKID_PCM_MCLK_COMP>,
+                       <&clkc CLKID_PCM_SCLK_GATE>;
+               clock-names =
+                       "mpll0",
+                       "pcm_mclk",
+                       "pcm_sclk";
+               pcm_mode = <1>; /* 0=slave mode, 1=master mode */
+       };
+       i2s_plat: i2s_platform {
+               compatible = "amlogic, aml-i2s";
+               interrupts = <0 29 1>;
+       };
+       pcm_plat: pcm_platform {
+               compatible = "amlogic, aml-pcm";
+       };
+       spdif_codec: spdif_codec{
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml-spdif-codec";
+               pinctrl-names = "audio_spdif";
+               pinctrl-0 = <&audio_spdif_pins>;
+       };
+       pcm_codec: pcm_codec{
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, pcm2BT-codec";
+       };
+       /* endof AUDIO MESON DEVICES */
+
+       /* AUDIO board specific */
+       dummy_codec:dummy{
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml_dummy_codec";
+               status = "disable";
+       };
+       amlogic_codec:t9015{
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml_codec_T9015";
+               reg = <0xc8832000 0x14>;
+               status = "okay";
+       };
+       aml_sound_meson {
+               compatible = "aml, meson-snd-card";
+               status = "okay";
+               aml-sound-card,format = "i2s";
+               aml_sound_card,name = "AML-MESONAUDIO";
+               aml,audio-routing =
+                               "Ext Spk","LOUTL",
+                               "Ext Spk","LOUTR";
+
+               mute_gpio-gpios = <&gpio GPIOH_5 0>;
+               mute_inv;
+               hp_disable;
+               hp_paraments = <800 300 0 5 1>;
+               pinctrl-names = "audio_i2s";
+               pinctrl-0 = <&audio_i2s_pins>;
+               cpu_list = <&cpudai0 &cpudai1 &cpudai2>;
+               codec_list = <&codec0 &codec1 &codec2>;
+               plat_list = <&i2s_plat &i2s_plat &pcm_plat>;
+               cpudai0: cpudai0 {
+                       sound-dai = <&i2s_dai>;
+               };
+               cpudai1: cpudai1 {
+                       sound-dai = <&spdif_dai>;
+               };
+               cpudai2: cpudai2 {
+                       sound-dai = <&pcm_dai>;
+               };
+               codec0: codec0 {
+                       sound-dai = <&amlogic_codec>;
+               };
+               codec1: codec1 {
+                       sound-dai = <&spdif_codec>;
+               };
+               codec2: codec2 {
+                       sound-dai = <&pcm_codec>;
+               };
+       };
+       /* END OF AUDIO board specific */
+       rdma{
+               compatible = "amlogic, meson, rdma";
+               dev_name = "amlogic-rdma";
+               status = "ok";
+               interrupts = <0 89 1>;
+               interrupt-names = "rdma";
+       };
+
+       amvenc_avc{
+               compatible = "amlogic, amvenc_avc";
+               dev_name = "amvenc_avc";
+               status = "okay";
+               interrupts = <0 45 1>;
+               interrupt-names = "mailbox_2";
+       };
+
+       hevc_enc{
+               compatible = "cnm, HevcEnc";
+               dev_name = "HevcEnc";
+               status = "okay";
+               interrupts = <0 187 1>;
+               interrupt-names = "wave420l_irq";
+               #address-cells=<1>;
+               #size-cells=<1>;
+               ranges;
+               io_reg_base{
+                       reg = <0xc8810000 0x4000>;
+               };
+       };
+
+       picdec {
+               compatible = "amlogic, picdec";
+               memory-region = <&picdec_cma_reserved>;
+               dev_name = "picdec";
+               status = "okay";
+       };
+
+       ppmgr {
+               compatible = "amlogic, ppmgr";
+               memory-region = <&ppmgr_reserved>;
+               dev_name = "ppmgr";
+               status = "okay";
+       };
+
+       deinterlace {
+               compatible = "amlogic, deinterlace";
+               status = "okay";
+               flag_cma = <1>;/*0:use reserved;1:use cma*/
+               //memory-region = <&di_reserved>;
+               memory-region = <&di_cma_reserved>;
+               interrupts = <0 46 1 0 6 1>;
+               interrupt-names = "de_irq",     "timerc";
+               /*
+                * nr_size(byte) = 1920*544*2(yuv422 8bit) |
+                * 1920*544*2*12/8(yuv422 10bit)
+                * | 1920*544*2*10/8(yuv422 10bit full pack mode)
+                */
+               /* mtn_size(byte) = 1920*544/2 */
+               /* count_size(byte) = 1920*544/2 */
+               buffer-size = <3133440>;
+               hw-version = <2>;
+       };
+
+       ionvideo {
+               compatible = "amlogic, ionvideo";
+               dev_name = "ionvideo";
+               status = "okay";
+       };
+
+       amlvideo {
+               compatible = "amlogic, amlvideo";
+               dev_name = "amlvideo";
+               status = "okay";
+       };
+
+       amlvideo2_0 {
+               compatible = "amlogic, amlvideo2";
+               dev_name = "amlvideo2";
+               status = "okay";
+               amlvideo2_id = <0>;
+               cma_mode = <1>;
+       };
+
+       amlvideo2_1 {
+               compatible = "amlogic, amlvideo2";
+               dev_name = "amlvideo2";
+               status = "okay";
+               amlvideo2_id = <1>;
+               cma_mode = <1>;
+       };
+
+       /*if you want to use vdin just modify status to "ok"*/
+       vdin0 {
+               compatible = "amlogic, vdin";
+               /*memory-region = <&vdin0_cma_reserved>;*/
+               dev_name = "vdin0";
+               status = "ok";
+               reserve-iomap = "true";
+               flag_cma = <1>;/*1:share with codec_mm;2:cma alone*/
+               /*MByte, if 10bit disable: 64M(YUV422),
+                *if 10bit enable: 64*1.5 = 96M(YUV422)
+                *if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
+                *if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
+                *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+                *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+                */
+               cma_size = <16>;
+               interrupts = <0 83 1>;
+               rdma-irq = <2>;
+               /*clocks = <&clock CLK_FPLL_DIV5>,
+                *      <&clock CLK_VDIN_MEAS_CLK>;
+                *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+                */
+               vdin_id = <0>;
+               /*vdin write mem color depth support:
+                *bit0:support 8bit
+                *bit1:support 9bit
+                *bit2:support 10bit
+                *bit3:support 12bit
+                *bit4:support yuv422 10bit full pack mode (from txl new add)
+                */
+               tv_bit_mode = <1>;
+       };
+       vdin1 {
+               compatible = "amlogic, vdin";
+               memory-region = <&vdin1_cma_reserved>;
+               dev_name = "vdin1";
+               status = "ok";
+               reserve-iomap = "true";
+               flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
+               interrupts = <0 85 1>;
+               rdma-irq = <4>;
+               /*clocks = <&clock CLK_FPLL_DIV5>,
+                *      <&clock CLK_VDIN_MEAS_CLK>;
+                *clock-names = "fclk_div5", "cts_vdin_meas_clk";
+                */
+               vdin_id = <1>;
+               /*vdin write mem color depth support:
+                *bit0:support 8bit
+                *bit1:support 9bit
+                *bit2:support 10bit
+                *bit3:support 12bit
+                */
+               tv_bit_mode = <1>;
+       };
+       amvdec_656in {
+               compatible = "amlogic, amvdec_656in";
+               dev_name = "amvdec_656in";
+               status = "disabled";
+               reg = <0xd0048000 0x7c>,
+                       <0xd0050000 0x7c>;
+               clocks = <&clkc CLKID_BT656_CLK1_COMP>,
+                       <&clkc CLKID_BT656>,
+                       <&clkc CLKID_BT656_PCLK1>;
+               clock-names = "cts_bt656_clk1",
+                       "clk_gate_bt656",
+                       "clk_gate_bt656_pclk1";
+
+               /* bt656in1, bt656in2 */
+               bt656in1 {
+                       bt656_id = <1>;
+                       status = "okay";
+               };
+       };
+       hdmirx_ext {
+               compatible = "amlogic, hdmirx_ext";
+               dev_name = "hdmirx_ext";
+               status = "disabled";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmirx_ext_pins>;
+               vdin_sel = <0>;
+               bt656_sel = <1>;
+               reset-gpios = <&gpio GPIODV_20 GPIO_ACTIVE_HIGH>;
+               reset_gpio_name = "GPIODV_20";
+               reset_gpio_val = <0 1>; /* reset_on, reset_off */
+
+               ext_dev_name = "sii9135";
+               i2c_addr = <0x30>; /* pull_up: 0x31, pull_down: 0x30 */
+               i2c_bus = "i2c_bus_c";
+       };
+
+       amlvecm {
+               compatible = "amlogic, vecm";
+               dev_name = "aml_vecm";
+               status = "okay";
+               gamma_en = <0>;/*1:enabel ;0:disable*/
+               wb_en = <0>;/*1:enabel ;0:disable*/
+               cm_en = <0>;/*1:enabel ;0:disable*/
+               /*1:enabel osd lut 100 table;0:disable*/
+               cfg_en_osd_100 = <1>;
+               /*0: 709/601  1: bt2020*/
+               tx_op_color_primary = <0>;
+       };
+
+       unifykey{
+               compatible = "amlogic, unifykey";
+               status = "ok";
+
+               unifykey-num = <16>;
+               unifykey-index-0 = <&keysn_0>;
+               unifykey-index-1 = <&keysn_1>;
+               unifykey-index-2 = <&keysn_2>;
+               unifykey-index-3 = <&keysn_3>;
+               unifykey-index-4 = <&keysn_4>;
+               unifykey-index-5 = <&keysn_5>;
+               unifykey-index-6 = <&keysn_6>;
+               unifykey-index-7 = <&keysn_7>;
+               unifykey-index-8 = <&keysn_8>;
+               unifykey-index-9 = <&keysn_9>;
+               unifykey-index-10= <&keysn_10>;
+               unifykey-index-11= <&keysn_11>;
+               unifykey-index-12= <&keysn_12>;
+               unifykey-index-13= <&keysn_13>;
+               unifykey-index-14= <&keysn_14>;
+               unifykey-index-15= <&keysn_15>;
+
+               keysn_0: key_0{
+                       key-name = "usid";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_1:key_1{
+                       key-name = "mac";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_2:key_2{
+                       key-name = "hdcp";
+                       key-device = "secure";
+                       key-type = "sha1";
+                       key-permit = "read","write","del";
+               };
+               keysn_3:key_3{
+                       key-name = "secure_boot_set";
+                       key-device = "efuse";
+                       key-permit = "write";
+               };
+               keysn_4:key_4{
+                       key-name = "mac_bt";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+                       key-type  = "mac";
+               };
+               keysn_5:key_5{
+                       key-name = "mac_wifi";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+                       key-type = "mac";
+               };
+               keysn_6:key_6{
+                       key-name = "hdcp2_tx";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_7:key_7{
+                       key-name = "hdcp2_rx";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_8:key_8{
+                       key-name = "widevinekeybox";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_9:key_9{
+                       key-name = "deviceid";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_10:key_10{
+                       key-name = "hdcp22_fw_private";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_11:key_11{
+                       key-name = "PlayReadykeybox25";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_12:key_12{
+                       key-name = "prpubkeybox";// PlayReady
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_13:key_13{
+                       key-name = "prprivkeybox";// PlayReady
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_14:key_14{
+                       key-name = "attestationkeybox";// attestation key
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_15:key_15{
+                       key-name = "region_code";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+       };//End unifykey
+       dvb {
+               compatible = "amlogic, dvb";
+               dev_name = "dvb";
+
+               fe0_mode = "external";
+               fe0_demod = "Atbm8881";
+               fe0_i2c_adap_id = <&i2c1>;
+               fe0_demod_i2c_addr = <0xc0>;
+               fe0_ts = <0>;
+               fe0_reset_value = <0>;
+               fe0_reset_gpio = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH>;
+
+               ts0 = "parallel";
+               ts0_control = <0>;
+               ts0_invert = <0>;
+               interrupts = <0 23 1
+               0 5 1
+               0 21 1
+               0 19 1
+               0 25 1
+               0 18 1
+               0 24 1>;
+               interrupt-names = "demux0_irq",
+               "demux1_irq",
+               "demux2_irq",
+               "dvr0_irq",
+               "dvr1_irq",
+               "dvrfill0_fill",
+               "dvrfill1_flush";
+               pinctrl-names = "p_ts0", "s_ts0";
+               pinctrl-0 = <&dvb_p_ts0_pins>;
+               pinctrl-1 = <&dvb_s_ts0_pins>;
+               clocks = <&clkc CLKID_DEMUX
+               &clkc CLKID_ASYNC_FIFO
+               &clkc CLKID_AHB_ARB0
+               &clkc CLKID_HIU_IFACE>;
+               clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+       };
+
+       /* SMC */
+       smartcard{
+               compatible = "amlogic,smartcard";
+               irq_trigger_type = "GPIO_IRQ_LOW";
+
+               reset_pin-gpios = <&gpio GPIODV_21 GPIO_ACTIVE_HIGH>;
+               detect_pin-gpios = <&gpio GPIODV_20 GPIO_ACTIVE_HIGH>;
+               enable_5v3v_pin-gpios = <&gpio GPIODV_19 GPIO_ACTIVE_HIGH>;
+               enable_pin-gpios = <&gpio GPIODV_20 GPIO_ACTIVE_HIGH>;
+
+               interrupts = <0 37 1>;
+               interrupt-names = "smc0_irq";
+               /*
+                *Smc clock source, if change this,
+                *you must adjust clk and divider in smartcard.c
+                */
+               smc0_clock_source = <0>;
+               smc0_irq = <37>;                //smc irq
+               /*0: high voltage on detect pin indicates card in.*/
+               smc0_det_invert = <0>;
+               smc0_5v3v_level = <0>;
+               /*Ordinarily,smartcard controller needs a enable pin.*/
+               smc_need_enable_pin = "no";
+               reset_level = <0>;
+               smc0_enable_level = <0>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&sd_iso7816_pins>;
+               clocks = <&clkc CLKID_SMART_CARD>;
+               clock-names = "smartcard";
+               status = "okay";
+       };
+};
+&efuse {
+       status = "ok";
+};
+
+&pwm_ef {
+       status = "okay";
+};
+
+&audio_data{
+       status = "okay";
+};
+//&i2c_a {
+//  status = "disabled";
+//};
+//&i2c_b {
+//  status = "okay";
+//};
+
+//&i2c_c {
+//     status = "okay";
+//     pinctrl-0=<&c_i2c_master_pin1>;
+//};
+
+&i2c1 {
+       status = "okay";
+       clock-frequency = <300000>;
+       pinctrl-names="default";
+       pinctrl-0=<&b_i2c_master>;
+};
+&pinctrl_periphs {
+       hdmirx_ext_pins: hdmirx_ext_pins {
+               mux {
+                       groups = "dvp_vs",
+                               "dvp_hs",
+                               "dvp_clk",
+                               "dvp_d2_9";
+                       function = "dvp";
+               };
+       };
+}; /* end of pinctrl_periphs */
diff --git a/arch/arm/boot/dts/amlogic/partition_mbox_ab.dtsi b/arch/arm/boot/dts/amlogic/partition_mbox_ab.dtsi
new file mode 100644 (file)
index 0000000..a78cd67
--- /dev/null
@@ -0,0 +1,169 @@
+/*
+ * Amlogic partition set for normal
+ *
+ * Copyright (c) 2017-2017 Amlogic Ltd
+ *
+ * This file is licensed under a dual GPLv2 or BSD license.
+ *
+ */
+/ {
+    partitions: partitions{
+               parts = <18>;
+               part-0 = <&logo>;
+               part-1 = <&boot_a>;
+               part-2 = <&misc>;
+               part-3 = <&dto>;
+               part-4 = <&cri_data>;
+               part-5 = <&param>;
+               part-6 = <&boot_b>;
+               part-7 = <&vbmeta_a>;
+               part-8 = <&vbmeta_b>;
+               part-9 = <&rsv>;
+               part-10 = <&tee>;
+               part-11 = <&vendor_a>;
+               part-12 = <&vendor_b>;
+               part-13 = <&odm_a>;
+               part-14 = <&odm_b>;
+               part-15 = <&system_a>;
+               part-16 = <&system_b>;
+               part-17 = <&data>;
+
+               logo:logo{
+                       pname = "logo";
+                       size = <0x0 0x800000>;
+                       mask = <1>;
+               };
+               boot_a:boot_a{
+                       pname = "boot_a";
+                       size = <0x0 0x1000000>;
+                       mask = <1>;
+               };
+               misc:misc{
+                       pname = "misc";
+                       size = <0x0 0x800000>;
+                       mask = <1>;
+               };
+               dto:dto{
+                       pname = "dto";
+                       size = <0x0 0x800000>;
+                       mask = <1>;
+               };
+               cri_data:cri_data
+               {
+                       pname = "cri_data";
+                       size = <0x0 0x800000>;
+                       mask = <2>;
+               };
+               vbmeta_a:vbmeta_a{
+                       pname = "vbmeta_a";
+                       size = <0x0 0x100000>;
+                       mask = <1>;
+               };
+               vbmeta_b:vbmeta_b{
+                       pname = "vbmeta_b";
+                       size = <0x0 0x100000>;
+                       mask = <1>;
+               };
+               rsv:rsv{
+                       pname = "rsv";
+                       size = <0x0 0xE00000>;
+                       mask = <1>;
+               };
+               param:param{
+                       pname = "param";
+                       size = <0x0 0x1000000>;
+                       mask = <2>;
+               };
+               boot_b:boot_b
+               {
+                       pname = "boot_b";
+                       size = <0x0 0x1000000>;
+                       mask = <1>;
+               };
+               tee:tee{
+                       pname = "tee";
+                       size = <0x0 0x2000000>;
+                       mask = <1>;
+               };
+               vendor_a:vendor_a
+               {
+                       pname = "vendor_a";
+                       size = <0x0 0x10000000>;
+                       mask = <1>;
+               };
+               vendor_b:vendor_b
+               {
+                       pname = "vendor_b";
+                       size = <0x0 0x10000000>;
+                       mask = <1>;
+               };
+               odm_a:odm_a
+               {
+                       pname = "odm_a";
+                       size = <0x0 0x10000000>;
+                       mask = <1>;
+               };
+               odm_b:odm_b
+               {
+                       pname = "odm_b";
+                       size = <0x0 0x10000000>;
+                       mask = <1>;
+               };
+               system_a:system_a
+               {
+                       pname = "system_a";
+                       size = <0x0 0x74000000>;
+                       mask = <1>;
+               };
+               system_b:system_b
+               {
+                       pname = "system_b";
+                       size = <0x0 0x74000000>;
+                       mask = <1>;
+               };
+               data:data
+               {
+                       pname = "data";
+                       size = <0xffffffff 0xffffffff>;
+                       mask = <4>;
+               };
+       };
+
+       firmware {
+               android {
+                       compatible = "android,firmware";
+                       vbmeta {
+                               compatible = "android,vbmeta";
+                               parts = "boot,system,vendor";
+                               by_name_prefix="/dev/block";
+                       };
+               fstab {
+                       compatible = "android,fstab";
+                       system {
+                               compatible = "android,system";
+                               dev = "/dev/block/system";
+                               type = "ext4";
+                               mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+                               fsmgr_flags = "wait,slotselect";
+                               };
+
+                       vendor {
+                               compatible = "android,vendor";
+                               dev = "/dev/block/vendor";
+                               type = "ext4";
+                               mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+                               fsmgr_flags = "wait,slotselect";
+                               };
+
+                       odm {
+                               compatible = "android,odm";
+                               dev = "/dev/block/odm";
+                               type = "ext4";
+                               mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
+                               fsmgr_flags = "wait,slotselect";
+                               };
+                       };
+               };
+       };
+
+};/* end of / */