clk: qcom: smd-rpm: Add clocks for MSM8917

MSM8917 has mostly the same rpm clocks as MSM8953, but lacks RF_CLK3 and
IPA_CLK and additionally has the BIMC_GPU clock.

Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230223180935.60546-5-otto.pflueger@abscue.de

diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
index bab96fc..887b945 100644 (file)
--- a/drivers/clk/qcom/clk-smd-rpm.c
+++ b/drivers/clk/qcom/clk-smd-rpm.c
@@ -573,6 +573,40 @@ static const struct rpm_smd_clk_desc rpm_clk_msm8916 = {
        .num_clks = ARRAY_SIZE(msm8916_clks),
 };
 
+static struct clk_smd_rpm *msm8917_clks[] = {
+       [RPM_SMD_XO_CLK_SRC]            = &clk_smd_rpm_branch_bi_tcxo,
+       [RPM_SMD_XO_A_CLK_SRC]          = &clk_smd_rpm_branch_bi_tcxo_a,
+       [RPM_SMD_PNOC_CLK]              = &clk_smd_rpm_bus_0_pcnoc_clk,
+       [RPM_SMD_PNOC_A_CLK]            = &clk_smd_rpm_bus_0_pcnoc_a_clk,
+       [RPM_SMD_SNOC_CLK]              = &clk_smd_rpm_bus_1_snoc_clk,
+       [RPM_SMD_SNOC_A_CLK]            = &clk_smd_rpm_bus_1_snoc_a_clk,
+       [RPM_SMD_BIMC_CLK]              = &clk_smd_rpm_bimc_clk,
+       [RPM_SMD_BIMC_A_CLK]            = &clk_smd_rpm_bimc_a_clk,
+       [RPM_SMD_BIMC_GPU_CLK]          = &clk_smd_rpm_bimc_gpu_clk,
+       [RPM_SMD_BIMC_GPU_A_CLK]        = &clk_smd_rpm_bimc_gpu_a_clk,
+       [RPM_SMD_SYSMMNOC_CLK]          = &clk_smd_rpm_bus_2_sysmmnoc_clk,
+       [RPM_SMD_SYSMMNOC_A_CLK]        = &clk_smd_rpm_bus_2_sysmmnoc_a_clk,
+       [RPM_SMD_QDSS_CLK]              = &clk_smd_rpm_qdss_clk,
+       [RPM_SMD_QDSS_A_CLK]            = &clk_smd_rpm_qdss_a_clk,
+       [RPM_SMD_BB_CLK1]               = &clk_smd_rpm_bb_clk1,
+       [RPM_SMD_BB_CLK1_A]             = &clk_smd_rpm_bb_clk1_a,
+       [RPM_SMD_BB_CLK2]               = &clk_smd_rpm_bb_clk2,
+       [RPM_SMD_BB_CLK2_A]             = &clk_smd_rpm_bb_clk2_a,
+       [RPM_SMD_RF_CLK2]               = &clk_smd_rpm_rf_clk2,
+       [RPM_SMD_RF_CLK2_A]             = &clk_smd_rpm_rf_clk2_a,
+       [RPM_SMD_DIV_CLK2]              = &clk_smd_rpm_div_clk2,
+       [RPM_SMD_DIV_A_CLK2]            = &clk_smd_rpm_div_clk2_a,
+       [RPM_SMD_BB_CLK1_PIN]           = &clk_smd_rpm_bb_clk1_pin,
+       [RPM_SMD_BB_CLK1_A_PIN]         = &clk_smd_rpm_bb_clk1_a_pin,
+       [RPM_SMD_BB_CLK2_PIN]           = &clk_smd_rpm_bb_clk2_pin,
+       [RPM_SMD_BB_CLK2_A_PIN]         = &clk_smd_rpm_bb_clk2_a_pin,
+};
+
+static const struct rpm_smd_clk_desc rpm_clk_msm8917 = {
+       .clks = msm8917_clks,
+       .num_clks = ARRAY_SIZE(msm8917_clks),
+};
+
 static struct clk_smd_rpm *msm8936_clks[] = {
        [RPM_SMD_XO_CLK_SRC]            = &clk_smd_rpm_branch_bi_tcxo,
        [RPM_SMD_XO_A_CLK_SRC]          = &clk_smd_rpm_branch_bi_tcxo_a,
@@ -1230,6 +1264,7 @@ static const struct of_device_id rpm_smd_clk_match_table[] = {
        { .compatible = "qcom,rpmcc-msm8226", .data = &rpm_clk_msm8974 },
        { .compatible = "qcom,rpmcc-msm8909", .data = &rpm_clk_msm8909 },
        { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 },
+       { .compatible = "qcom,rpmcc-msm8917", .data = &rpm_clk_msm8917 },
        { .compatible = "qcom,rpmcc-msm8936", .data = &rpm_clk_msm8936 },
        { .compatible = "qcom,rpmcc-msm8953", .data = &rpm_clk_msm8953 },
        { .compatible = "qcom,rpmcc-msm8974", .data = &rpm_clk_msm8974 },