Convert exception ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 79870f561d2baa966cafa0959fa082a9581298d1..08366e8fc08cce55b367c7953dbd896bc4ed2e98 100644 (file)
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -321,7 +321,6 @@ void cpu_set_cwp(CPUSPARCState *env1, int new_cwp);
 #endif
 
 int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
-void raise_exception(int tt);
 void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
                           int is_asi);
 void cpu_check_irqs(CPUSPARCState *env);

diff --git a/target-sparc/exec.h b/target-sparc/exec.h
index fce472b39f3491d81dba3123c1c847b26017e73b..2f1169b3ae06442687c41e780d30e595828d653b 100644 (file)
--- a/target-sparc/exec.h
+++ b/target-sparc/exec.h
@@ -66,7 +66,6 @@ void do_fxtoq(void);
 #endif
 #endif
 void do_interrupt(int intno);
-void raise_exception(int tt);
 void memcpy32(target_ulong *dst, const target_ulong *src);
 target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev);
 void dump_mmu(CPUState *env);

diff --git a/target-sparc/helper.h b/target-sparc/helper.h
index 94232b34766879a0821e90f3524ce5b2416ecffc..88b56e27163f5af633f04ad2a14ced2ba3c59a3c 100644 (file)
--- a/target-sparc/helper.h
+++ b/target-sparc/helper.h
@@ -72,3 +72,4 @@ void TCG_HELPER_PROTO helper_fcmpeq_fcc2(void);
 void TCG_HELPER_PROTO helper_fcmpeq_fcc3(void);
 #endif
 #endif
+void TCG_HELPER_PROTO raise_exception(int tt);

diff --git a/target-sparc/op.c b/target-sparc/op.c
index 0e1423b547e853940720c7ce02a9dd23e02cdf8d..ce4c87885fba7503759747b6a72ed89dd55671b0 100644 (file)
--- a/target-sparc/op.c
+++ b/target-sparc/op.c
@@ -857,22 +857,6 @@ void OPPROTO op_restore(void)
 }
 #endif
 
-void OPPROTO op_exception(void)
-{
-    env->exception_index = PARAM1;
-    cpu_loop_exit();
-    FORCE_RET();
-}
-
-void OPPROTO op_fpexception_im(void)
-{
-    env->exception_index = TT_FP_EXCP;
-    env->fsr &= ~FSR_FTT_MASK;
-    env->fsr |= PARAM1;
-    cpu_loop_exit();
-    FORCE_RET();
-}
-
 void OPPROTO op_eval_ba(void)
 {
     T2 = 1;

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 60d88ff08ad6cacff189d96bb62a9b561fcad2bc..10890827d2c24632f8224fcf2a647407e12a375f 100644 (file)
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -807,6 +807,24 @@ static inline void gen_op_fcmpeq(int fccno)
 
 #endif
 
+static inline void gen_op_exception(int exception)
+{
+    TCGv r_except;
+
+    r_except = tcg_temp_new(TCG_TYPE_I32);
+    tcg_gen_movi_i32(r_except, exception);
+    tcg_gen_helper_0_1(raise_exception, r_except);
+}
+
+static inline void gen_op_fpexception_im(int fsr_flags)
+{
+    tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr));
+    tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, ~FSR_FTT_MASK);
+    tcg_gen_ori_tl(cpu_tmp0, cpu_tmp0, fsr_flags);
+    tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr));
+    gen_op_exception(TT_FP_EXCP);
+}
+
 static int gen_trap_ifnofpu(DisasContext * dc)
 {
 #if !defined(CONFIG_USER_ONLY)