Set dma max segment size for encoder and decoder driver.
Fix following warning with CONFIG_DMA_API_DEBUG_SG=y
[ 75.147825] ------------[ cut here ]------------
[ 75.147844] mtk-vcodec-enc
19002000.vcodec: DMA-API: mapping sg segment longer than device claims to support [len=983040] [max=65536]
[ 75.147876] WARNING: CPU: 2 PID: 4069 at kernel/dma/debug.c:1302 debug_dma_map_sg+0x1a8/0x2c4
...
[ 75.148139] Call trace:
[ 75.148149] debug_dma_map_sg+0x1a8/0x2c4
[ 75.148165] vb2_dc_get_userptr+0x228/0x364 [videobuf2_dma_contig]
[ 75.148178] __buf_prepare+0x3ac/0x8c0 [videobuf2_common]
[ 75.148188] vb2_core_qbuf+0xa4/0x58c [videobuf2_common]
[ 75.148199] vb2_qbuf+0x88/0xe4 [videobuf2_v4l2]
[ 75.148211] v4l2_m2m_qbuf+0x80/0xf8 [v4l2_mem2mem]
[ 75.148221] vidioc_venc_qbuf+0x3c/0x70 [mtk_vcodec_enc]
[ 75.148234] v4l_qbuf+0x48/0x58
[ 75.148242] __video_do_ioctl+0x200/0x37c
[ 75.148250] video_usercopy+0x360/0x834
[ 75.148259] video_ioctl2+0x38/0x48
[ 75.148267] v4l2_ioctl+0x6c/0x80
[ 75.148276] do_video_ioctl+0xefc/0x4b70
[ 75.148284] v4l2_compat_ioctl32+0x5c/0xcc
[ 75.148294] __arm64_compat_sys_ioctl+0xf4/0x240
[ 75.148304] el0_svc_common+0xac/0x198
[ 75.148312] el0_svc_compat_handler+0x2c/0x40
[ 75.148321] el0_svc_compat+0x8/0x18
[ 75.148328] irq event stamp: 0
[ 75.148337] hardirqs last enabled at (0): [<
0000000000000000>] (null)
[ 75.148347] hardirqs last disabled at (0): [<
ffffff90080e65c0>] copy_process+0x380/0x115c
[ 75.148356] softirqs last enabled at (0): [<
ffffff90080e65d8>] copy_process+0x398/0x115c
[ 75.148364] softirqs last disabled at (0): [<
0000000000000000>] (null)
[ 75.148372] ---[ end trace
588bf529451e3531 ]---
Reported-by: Anand K Mistry <amistry@chromium.org>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
mtk_v4l2_err("[VPU] vpu device in not ready");
return -EPROBE_DEFER;
}
+ if (!pdev->dev.dma_parms) {
+ pdev->dev.dma_parms = devm_kzalloc(&pdev->dev,
+ sizeof(*pdev->dev.dma_parms),
+ GFP_KERNEL);
+ if (!pdev->dev.dma_parms)
+ return -ENOMEM;
+ }
+ dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
vpu_wdt_reg_handler(dev->vpu_plat_dev, mtk_vcodec_dec_reset_handler,
dev, VPU_RST_DEC);
mtk_v4l2_err("[VPU] vpu device in not ready");
return -EPROBE_DEFER;
}
+ if (!pdev->dev.dma_parms) {
+ pdev->dev.dma_parms = devm_kzalloc(&pdev->dev,
+ sizeof(*pdev->dev.dma_parms),
+ GFP_KERNEL);
+ if (!pdev->dev.dma_parms)
+ return -ENOMEM;
+ }
+ dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
vpu_wdt_reg_handler(dev->vpu_plat_dev, mtk_vcodec_enc_reset_handler,
dev, VPU_RST_ENC);