[PATCH] x86_64: Support constant TSC feature in future AMD CPUs.
authorAndi Kleen <ak@suse.de>
Wed, 11 Jan 2006 21:42:02 +0000 (22:42 +0100)
committerLinus Torvalds <torvalds@g5.osdl.org>
Thu, 12 Jan 2006 03:01:09 +0000 (19:01 -0800)
Based on the documentation recently posted by Richard Brunner.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
arch/x86_64/kernel/setup.c

index a0e0c9c..754a05f 100644 (file)
@@ -910,6 +910,10 @@ static int __init init_amd(struct cpuinfo_x86 *c)
        } 
        display_cacheinfo(c);
 
+       /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
+       if (c->x86_power & (1<<8))
+               set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
+
        if (c->extended_cpuid_level >= 0x80000008) {
                c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
                if (c->x86_max_cores & (c->x86_max_cores - 1))
@@ -1268,6 +1272,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                "ttp",  /* thermal trip */
                "tm",
                "stc"
+               "?",
+               "constant_tsc",
        };