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PCI: aardvark: Fix checking for PIO Non-posted Request
author
Pali Rohár
<pali@kernel.org>
Thu, 24 Jun 2021 21:33:43 +0000
(23:33 +0200)
committer
Greg Kroah-Hartman
<gregkh@linuxfoundation.org>
Mon, 19 Jul 2021 07:45:01 +0000
(09:45 +0200)
commit
8ceeac307a79f68c0d0c72d6e48b82fa424204ec
upstream.
PIO_NON_POSTED_REQ for PIO_STAT register is incorrectly defined. Bit 10 in
register PIO_STAT indicates the response is to a non-posted request.
Link:
https://lore.kernel.org/r/20210624213345.3617-2-pali@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pci/controller/pci-aardvark.c
patch
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diff --git
a/drivers/pci/controller/pci-aardvark.c
b/drivers/pci/controller/pci-aardvark.c
index
41be72c
..
2e8a297
100644
(file)
--- a/
drivers/pci/controller/pci-aardvark.c
+++ b/
drivers/pci/controller/pci-aardvark.c
@@
-56,7
+56,7
@@
#define PIO_COMPLETION_STATUS_UR 1
#define PIO_COMPLETION_STATUS_CRS 2
#define PIO_COMPLETION_STATUS_CA 4
-#define PIO_NON_POSTED_REQ BIT(0)
+#define PIO_NON_POSTED_REQ BIT(
1
0)
#define PIO_ADDR_LS (PIO_BASE_ADDR + 0x8)
#define PIO_ADDR_MS (PIO_BASE_ADDR + 0xc)
#define PIO_WR_DATA (PIO_BASE_ADDR + 0x10)