media: dt-bindings: marvell,mmp2-ccic: Add Marvell MMP2 camera
authorLubomir Rintel <lkundrak@v3.sk>
Sun, 5 May 2019 14:00:22 +0000 (10:00 -0400)
committerMauro Carvalho Chehab <mchehab+samsung@kernel.org>
Thu, 23 May 2019 14:18:18 +0000 (10:18 -0400)
Add Marvell MMP2 camera host interface.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Documentation/devicetree/bindings/media/marvell,mmp2-ccic.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.txt b/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.txt
new file mode 100644 (file)
index 0000000..7ec2c8c
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+Marvell MMP2 camera host interface
+
+Required properties:
+ - compatible: Should be "marvell,mmp2-ccic".
+ - reg: Register base and size.
+ - interrupts: The interrupt number.
+ - #clock-cells: Must be 0.
+
+Optional properties:
+ - clocks: Reference to the input clock as specified by
+           Documentation/devicetree/bindings/clock/clock-bindings.txt.
+ - clock-names: Names of the clocks used; "axi" for the AXI bus interface,
+                "func" for the peripheral clock and "phy" for the parallel
+                video bus interface.
+ - clock-output-names: Optional clock source for sensors. Shall be "mclk".
+
+Required subnodes:
+ - port: The parallel bus interface port with a single endpoint linked to
+         the sensor's endpoint as described in
+         Documentation/devicetree/bindings/media/video-interfaces.txt.
+
+Required endpoint properties:
+ - bus-type: data bus type, <5> or <6> for Parallel or Bt.656 respectively
+ - pclk-sample: pixel clock polarity
+ - hsync-active: horizontal synchronization polarity (only required for
+   parallel bus)
+ - vsync-active: vertical synchronization polarity (only required for
+   parallel bus)
+
+Example:
+
+       camera0: camera@d420a000 {
+               compatible = "marvell,mmp2-ccic";
+               reg = <0xd420a000 0x800>;
+               interrupts = <42>;
+               clocks = <&soc_clocks MMP2_CLK_CCIC0>;
+               clock-names = "axi";
+               #clock-cells = <0>;
+               clock-output-names = "mclk";
+
+               port {
+                       camera0_0: endpoint {
+                               remote-endpoint = <&ov7670_0>;
+                                bus-type = <5>;      /* Parallel */
+                                hsync-active = <1>;  /* Active high */
+                                vsync-active = <1>;  /* Active high */
+                                pclk-sample = <0>;   /* Falling */
+                       };
+               };
+       };