drm/kmb: Remove clearing DPHY regs
authorEdmund Dea <edmund.j.dea@intel.com>
Tue, 20 Apr 2021 22:31:53 +0000 (15:31 -0700)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Thu, 21 Oct 2021 09:08:08 +0000 (11:08 +0200)
Don't clear the shared DPHY registers common to MIPI Rx and MIPI Tx during
DSI initialization since this was causing MIPI Rx reset. Rest of the
writes are bitwise, so will not affect Mipi Rx side.

Fixes: 98521f4d4b4c ("drm/kmb: Mipi DSI part of the display driver")
Signed-off-by: Edmund Dea <edmund.j.dea@intel.com>
Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211013233632.471892-3-anitha.chrisanthus@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/kmb/kmb_dsi.c

index 86e8e79..a0669b8 100644 (file)
@@ -1393,11 +1393,6 @@ int kmb_dsi_mode_set(struct kmb_dsi *kmb_dsi, struct drm_display_mode *mode,
                mipi_tx_init_cfg.lane_rate_mbps = data_rate;
        }
 
-       kmb_write_mipi(kmb_dsi, DPHY_ENABLE, 0);
-       kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL0, 0);
-       kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL1, 0);
-       kmb_write_mipi(kmb_dsi, DPHY_INIT_CTRL2, 0);
-
        /* Initialize mipi controller */
        mipi_tx_init_cntrl(kmb_dsi, &mipi_tx_init_cfg);