/** Name of the timer operations */
char name[32];
+ /** Frequency of timer in HZ */
+ unsigned long timer_freq;
+
/** Get free-running timer value */
u64 (*timer_value)(void);
struct aclint_mtimer_data {
/* Public details */
+ unsigned long mtime_freq;
unsigned long mtime_addr;
unsigned long mtime_size;
unsigned long mtimecmp_addr;
(mt->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
(mt->hart_count > ACLINT_MTIMER_MAX_HARTS))
return SBI_EINVAL;
+ if (reference && mt->mtime_freq != reference->mtime_freq)
+ return SBI_EINVAL;
/* Initialize private data */
aclint_mtimer_set_reference(mt, reference);
return rc;
}
+ mtimer.timer_freq = mt->mtime_freq;
sbi_timer_set_device(&mtimer);
return 0;
mt->has_64bit_mmio = true;
mt->has_shared_mtime = false;
+ rc = fdt_parse_timebase_frequency(fdt, &mt->mtime_freq);
+ if (rc)
+ return rc;
+
if (match->data) { /* SiFive CLINT */
/* Set CLINT addresses */
mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET;
#define ARIANE_PLIC_NUM_SOURCES 3
#define ARIANE_HART_COUNT 1
#define ARIANE_CLINT_ADDR 0x2000000
+#define ARIANE_ACLINT_MTIMER_FREQ 1000000
#define ARIANE_ACLINT_MSWI_ADDR (ARIANE_CLINT_ADDR + \
CLINT_MSWI_OFFSET)
#define ARIANE_ACLINT_MTIMER_ADDR (ARIANE_CLINT_ADDR + \
};
static struct aclint_mtimer_data mtimer = {
+ .mtime_freq = ARIANE_ACLINT_MTIMER_FREQ,
.mtime_addr = ARIANE_ACLINT_MTIMER_ADDR +
ACLINT_DEFAULT_MTIME_OFFSET,
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
#define OPENPITON_DEFAULT_PLIC_NUM_SOURCES 2
#define OPENPITON_DEFAULT_HART_COUNT 3
#define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000
+#define OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ 1000000
#define OPENPITON_DEFAULT_ACLINT_MSWI_ADDR \
(OPENPITON_DEFAULT_CLINT_ADDR + CLINT_MSWI_OFFSET)
#define OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR \
};
static struct aclint_mtimer_data mtimer = {
+ .mtime_freq = OPENPITON_DEFAULT_ACLINT_MTIMER_FREQ,
.mtime_addr = OPENPITON_DEFAULT_ACLINT_MTIMER_ADDR +
ACLINT_DEFAULT_MTIME_OFFSET,
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
void *fdt;
struct platform_uart_data uart_data;
struct plic_data plic_data;
+ unsigned long aclint_freq;
uint64_t clint_addr;
int rc;
if (!rc)
plic = plic_data;
+ rc = fdt_parse_timebase_frequency(fdt, &aclint_freq);
+ if (!rc)
+ mtimer.mtime_freq = aclint_freq;
+
rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
if (!rc) {
mswi.addr = clint_addr;
};
static struct aclint_mtimer_data mtimer = {
+ .mtime_freq = K210_ACLINT_MTIMER_FREQ,
.mtime_addr = K210_ACLINT_MTIMER_ADDR +
ACLINT_DEFAULT_MTIME_OFFSET,
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
#define K210_HART_COUNT 2
#define K210_UART_BAUDRATE 115200
-
+#define K210_ACLINT_MTIMER_FREQ 7800000
#define K210_CLK0_FREQ 26000000UL
#define K210_PLIC_NUM_SOURCES 65
};
static struct aclint_mtimer_data mtimer = {
+ .mtime_freq = UX600_TIMER_FREQ,
.mtime_addr = UX600_ACLINT_MTIMER_ADDR +
ACLINT_DEFAULT_MTIME_OFFSET,
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
#define PLATFORM_PLIC_NUM_SOURCES 128
#define PLATFORM_HART_COUNT 4
#define PLATFORM_CLINT_ADDR 0x2000000
+#define PLATFORM_ACLINT_MTIMER_FREQ 10000000
#define PLATFORM_ACLINT_MSWI_ADDR (PLATFORM_CLINT_ADDR + \
CLINT_MSWI_OFFSET)
#define PLATFORM_ACLINT_MTIMER_ADDR (PLATFORM_CLINT_ADDR + \
};
static struct aclint_mtimer_data mtimer = {
+ .mtime_freq = PLATFORM_ACLINT_MTIMER_FREQ,
.mtime_addr = PLATFORM_ACLINT_MTIMER_ADDR +
ACLINT_DEFAULT_MTIME_OFFSET,
.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,