* NEWS: Updated for the new -n option for the i386 assembler.
* config/tc-i386.c (optimize_align_code): New.
(md_shortopts): Add 'n'.
(md_parse_option): Handle 'n'.
(md_show_usage): Add '-n'.
* config/tc-i386.h (optimize_align_code): Declared.
(md_do_align): Optimize code alignment only if optimize_align_code
is not 0.
* doc/as.texinfo: Add the new -n option.
* doc/c-i386.texi: Document the new -n option.
+2003-06-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * NEWS: Updated for the new -n option for the i386 assembler.
+
+ * config/tc-i386.c (optimize_align_code): New.
+ (md_shortopts): Add 'n'.
+ (md_parse_option): Handle 'n'.
+ (md_show_usage): Add '-n'.
+
+ * config/tc-i386.h (optimize_align_code): Declared.
+ (md_do_align): Optimize code alignment only if optimize_align_code
+ is not 0.
+
+ * doc/as.texinfo: Add the new -n option.
+
+ * doc/c-i386.texi: Document the new -n option.
+
2003-06-07 Richard Henderson <rth@redhat.com>
* doc/as.texinfo: Document .cfi_rel_offset.
-*- text -*-
+* Added -n switch for x86 assembler. By default, x86 GAS replaces
+ multiple nop instructions used for alignment within code sections
+ with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
+ switch disables the optimization.
+
* Added support for MIPS32 Release 2.
* Added support for Xtensa architecture.
frame as in 32 bit mode. */
static char stackop_size = '\0';
+/* Non-zero to optimize code alignment. */
+int optimize_align_code = 1;
+
/* Non-zero to quieten some warnings. */
static int quiet_warnings = 0;
}
\f
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
-const char *md_shortopts = "kVQ:sq";
+const char *md_shortopts = "kVQ:sqn";
#else
-const char *md_shortopts = "q";
+const char *md_shortopts = "qn";
#endif
struct option md_longopts[] = {
{
switch (c)
{
+ case 'n':
+ optimize_align_code = 0;
+ break;
+
case 'q':
quiet_warnings = 1;
break;
-Q ignored\n\
-V print assembler version number\n\
-k ignored\n\
+ -n Do not optimize code alignment\n\
-q quieten some warnings\n\
-s ignored\n"));
#else
fprintf (stream, _("\
+ -n Do not optimize code alignment\n\
-q quieten some warnings\n"));
#endif
}
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
+extern int optimize_align_code;
+
#define md_do_align(n, fill, len, max, around) \
-if ((n) && !need_pass_2 \
- && (!(fill) || ((char)*(fill) == (char)0x90 && (len) == 1)) \
+if ((n) \
+ && !need_pass_2 \
+ && optimize_align_code \
+ && (!(fill) \
+ || ((char)*(fill) == (char)0x90 && (len) == 1)) \
&& subseg_text_p (now_seg)) \
{ \
frag_align_code ((n), (max)); \
@ifset I80386
@emph{Target i386 options:}
- [@b{--32}|@b{--64}]
+ [@b{--32}|@b{--64}] [@b{-n}]
@end ifset
@ifset I960
require that the necessary BFD support has been included (on a 32-bit
platform you have to add --enable-64-bit-bfd to configure enable 64-bit
usage and use x86-64 as target platform).
+
+@item -n
+By default, x86 GAS replaces multiple nop instructions used for
+alignment within code sections with multi-byte nop instructions such
+as leal 0(%esi,1),%esi. This switch disables the optimization.
@end table
@node i386-Syntax