drm/i915/fdi: move more FDI stuff to FDI link train hooks
authorJani Nikula <jani.nikula@intel.com>
Wed, 25 Aug 2021 15:47:50 +0000 (18:47 +0300)
committerJani Nikula <jani.nikula@intel.com>
Fri, 27 Aug 2021 08:43:51 +0000 (11:43 +0300)
Accept slight duplication in the fdi link train hooks in exchange for
simplification in ilk_pch_enable(). This lets us make
ivb_update_fdi_bc_bifurcation() static again, now in intel_fdi.c.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7984e670c6bb092d213d90f838d526d594d4a690.1629906431.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_fdi.c
drivers/gpu/drm/i915/display/intel_fdi.h

index c6552d9..b907c43 100644 (file)
@@ -2059,14 +2059,6 @@ static void ilk_pch_enable(const struct intel_atomic_state *state,
 
        assert_pch_transcoder_disabled(dev_priv, pipe);
 
-       if (IS_IVYBRIDGE(dev_priv))
-               ivb_update_fdi_bc_bifurcation(crtc_state);
-
-       /* Write the TU size bits before fdi link training, so that error
-        * detection works. */
-       intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
-                      intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
-
        /* For PCH output, training FDI link */
        dev_priv->display.fdi_link_train(crtc, crtc_state);
 
index f8ffd5c..f5e4298 100644 (file)
@@ -195,7 +195,7 @@ static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool e
        intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
 }
 
-void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
+static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
 {
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -270,6 +270,13 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
        i915_reg_t reg;
        u32 temp, tries;
 
+       /*
+        * Write the TU size bits before fdi link training, so that error
+        * detection works.
+        */
+       intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
+                      intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
+
        /* FDI needs bits from pipe first */
        assert_pipe_enabled(dev_priv, crtc_state->cpu_transcoder);
 
@@ -373,6 +380,13 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
        i915_reg_t reg;
        u32 temp, i, retry;
 
+       /*
+        * Write the TU size bits before fdi link training, so that error
+        * detection works.
+        */
+       intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
+                      intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
+
        /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
           for train result */
        reg = FDI_RX_IMR(pipe);
@@ -510,6 +524,15 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
        i915_reg_t reg;
        u32 temp, i, j;
 
+       ivb_update_fdi_bc_bifurcation(crtc_state);
+
+       /*
+        * Write the TU size bits before fdi link training, so that error
+        * detection works.
+        */
+       intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
+                      intel_de_read(dev_priv, PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
+
        /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
           for train result */
        reg = FDI_RX_IMR(pipe);
index 135802e..cda9a32 100644 (file)
@@ -16,7 +16,6 @@ int intel_fdi_link_freq(struct drm_i915_private *i915,
                        const struct intel_crtc_state *pipe_config);
 int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
                           struct intel_crtc_state *pipe_config);
-void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state);
 void intel_fdi_normal_train(struct intel_crtc *crtc);
 void ilk_fdi_disable(struct intel_crtc *crtc);
 void ilk_fdi_pll_disable(struct intel_crtc *intel_crtc);