freedreno/a6xx: Enable UBWC modifier
authorFritz Koenig <frkoenig@google.com>
Wed, 27 Feb 2019 02:31:38 +0000 (18:31 -0800)
committerRob Clark <robdclark@gmail.com>
Fri, 1 Mar 2019 15:51:16 +0000 (15:51 +0000)
Adding the supported_modifiers allows buffers
to be created with UBWC

src/gallium/drivers/freedreno/a6xx/fd6_screen.c
src/gallium/drivers/freedreno/freedreno_resource.c
src/gallium/drivers/freedreno/freedreno_screen.c
src/gallium/drivers/freedreno/freedreno_util.h

index d5c78c1..33e740f 100644 (file)
@@ -25,6 +25,7 @@
  *    Rob Clark <robclark@freedesktop.org>
  */
 
+#include "drm-uapi/drm_fourcc.h"
 #include "pipe/p_screen.h"
 #include "util/u_format.h"
 
@@ -137,4 +138,12 @@ fd6_screen_init(struct pipe_screen *pscreen)
        screen->setup_slices = fd6_setup_slices;
        screen->tile_mode = fd6_tile_mode;
        screen->fill_ubwc_buffer_sizes = fd6_fill_ubwc_buffer_sizes;
+
+       static const uint64_t supported_modifiers[] = {
+               DRM_FORMAT_MOD_LINEAR,
+               DRM_FORMAT_MOD_QCOM_COMPRESSED,
+       };
+
+       screen->supported_modifiers = supported_modifiers;
+       screen->num_supported_modifiers = ARRAY_SIZE(supported_modifiers);
 }
index 22e3874..36d61d7 100644 (file)
@@ -922,6 +922,12 @@ fd_resource_create_with_modifiers(struct pipe_screen *pscreen,
        if (tmpl->bind & PIPE_BIND_SHARED)
                allow_ubwc = find_modifier(DRM_FORMAT_MOD_QCOM_COMPRESSED, modifiers, count);
 
+       /* TODO turn on UBWC for all internal buffers
+        * Manhattan benchmark shows artifacts when enabled.  Once this
+        * is fixed the following line can be removed.
+        */
+       allow_ubwc &= !!(fd_mesa_debug & FD_DBG_UBWC);
+
        if (screen->tile_mode &&
                        (tmpl->target != PIPE_BUFFER) &&
                        !linear) {
index 5b107b8..98f720a 100644 (file)
@@ -88,6 +88,7 @@ static const struct debug_named_value debug_options[] = {
                {"ttile",     FD_DBG_TTILE,  "Enable texture tiling (a5xx)"},
                {"perfcntrs", FD_DBG_PERFC,  "Expose performance counters"},
                {"softpin",   FD_DBG_SOFTPIN,"Enable softpin command submission (experimental)"},
+               {"ubwc",      FD_DBG_UBWC,   "Enable UBWC for all internal buffers (experimental)"},
                DEBUG_NAMED_VALUE_END
 };
 
index 3e7ea63..51eefc4 100644 (file)
@@ -85,7 +85,7 @@ enum adreno_stencil_op fd_stencil_op(unsigned op);
 #define FD_DBG_TTILE  0x200000
 #define FD_DBG_PERFC  0x400000
 #define FD_DBG_SOFTPIN 0x800000
-
+#define FD_DBG_UBWC  0x1000000
 extern int fd_mesa_debug;
 extern bool fd_binning_enabled;