ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5
authorKrzysztof Kozlowski <krzk@kernel.org>
Fri, 16 Sep 2016 19:42:47 +0000 (21:42 +0200)
committerKrzysztof Kozlowski <krzk@kernel.org>
Thu, 3 Nov 2016 20:44:53 +0000 (22:44 +0200)
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
generates an error:
genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)

The GIC requires shared interrupts to be edge rising or level high.
Platform declares support for both.  Arbitrarily choose level high
everywhere hoping it will work on each platform.

Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reported-by: Alban Browaeys <alban.browaeys@gmail.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
arch/arm/boot/dts/exynos5.dtsi

index 8f06609..d9b1607 100644 (file)
@@ -13,6 +13,7 @@
  * published by the Free Software Foundation.
  */
 
+#include <dt-bindings/interrupt-controller/irq.h>
 #include "exynos-syscon-restart.dtsi"
 
 / {
                        interrupt-controller;
                        samsung,combiner-nr = <32>;
                        reg = <0x10440000 0x1000>;
-                       interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
-                                       <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
-                                       <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
-                                       <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
-                                       <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
-                                       <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
-                                       <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
-                                       <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
+                       interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 1 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 2 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 3 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 4 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 5 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 6 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 7 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 8 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 9 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 10 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 11 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 12 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 13 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 14 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 15 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 16 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 17 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 18 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 19 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 20 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 21 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 22 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 23 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 24 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 25 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 26 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 27 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 28 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 29 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 30 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 31 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                gic: interrupt-controller@10481000 {
                serial_0: serial@12C00000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x12C00000 0x100>;
-                       interrupts = <0 51 0>;
+                       interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                serial_1: serial@12C10000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x12C10000 0x100>;
-                       interrupts = <0 52 0>;
+                       interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                serial_2: serial@12C20000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x12C20000 0x100>;
-                       interrupts = <0 53 0>;
+                       interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                serial_3: serial@12C30000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x12C30000 0x100>;
-                       interrupts = <0 54 0>;
+                       interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                i2c_0: i2c@12C60000 {
                        compatible = "samsung,s3c2440-i2c";
                        reg = <0x12C60000 0x100>;
-                       interrupts = <0 56 0>;
+                       interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        samsung,sysreg-phandle = <&sysreg_system_controller>;
                i2c_1: i2c@12C70000 {
                        compatible = "samsung,s3c2440-i2c";
                        reg = <0x12C70000 0x100>;
-                       interrupts = <0 57 0>;
+                       interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        samsung,sysreg-phandle = <&sysreg_system_controller>;
                i2c_2: i2c@12C80000 {
                        compatible = "samsung,s3c2440-i2c";
                        reg = <0x12C80000 0x100>;
-                       interrupts = <0 58 0>;
+                       interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        samsung,sysreg-phandle = <&sysreg_system_controller>;
                i2c_3: i2c@12C90000 {
                        compatible = "samsung,s3c2440-i2c";
                        reg = <0x12C90000 0x100>;
-                       interrupts = <0 59 0>;
+                       interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        samsung,sysreg-phandle = <&sysreg_system_controller>;
                rtc: rtc@101E0000 {
                        compatible = "samsung,s3c6410-rtc";
                        reg = <0x101E0000 0x100>;
-                       interrupts = <0 43 0>, <0 44 0>;
+                       interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>,
+                                    <0 44 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };