arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thu, 27 Oct 2022 09:55:00 +0000 (11:55 +0200)
committerMatthias Brugger <matthias.bgg@gmail.com>
Mon, 21 Nov 2022 12:20:16 +0000 (13:20 +0100)
The UART nodes had a dummy clock for early bringup, as it is
expected that these are left on by the bootloader: now that
the pericfg clock controller is supported, we can replace
them with the real clocks.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221027095504.37432-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt6795.dtsi

index aff9a5b..34e1f10 100644 (file)
                                     "mediatek,mt6577-uart";
                        reg = <0 0x11002000 0 0x400>;
                        interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
-                       clocks = <&clk26m>;
+                       clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
+                       clock-names = "baud", "bus";
                        status = "disabled";
                };
 
                                     "mediatek,mt6577-uart";
                        reg = <0 0x11003000 0 0x400>;
                        interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
-                       clocks = <&clk26m>;
+                       clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
+                       clock-names = "baud", "bus";
                        status = "disabled";
                };
 
                                     "mediatek,mt6577-uart";
                        reg = <0 0x11004000 0 0x400>;
                        interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
-                       clocks = <&clk26m>;
+                       clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
+                       clock-names = "baud", "bus";
                        status = "disabled";
                };
 
                                     "mediatek,mt6577-uart";
                        reg = <0 0x11005000 0 0x400>;
                        interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
-                       clocks = <&clk26m>;
+                       clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
+                       clock-names = "baud", "bus";
                        status = "disabled";
                };
        };