drm/msm/dpu: remove hwversion field from data structures
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 2 Jun 2022 20:24:43 +0000 (23:24 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Mon, 4 Jul 2022 18:05:27 +0000 (21:05 +0300)
The driver should not depend on hw revision for detecting features.
Instead it should use features from the hw catalog. Drop the hwversion
field from struct dpu_mdss_cfg and struct dpu_hw_blk_reg_map.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/488160/
Link: https://lore.kernel.org/r/20220602202447.1755115-4-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
15 files changed:
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

index 6647cde..61271d9 100644 (file)
@@ -2004,7 +2004,6 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev)
        for (i = 0; i < ARRAY_SIZE(cfg_handler); i++) {
                if (cfg_handler[i].hw_rev == hw_rev) {
                        cfg_handler[i].cfg_init(dpu_cfg);
-                       dpu_cfg->hwversion = hw_rev;
                        return dpu_cfg;
                }
        }
index f70de97..4225f58 100644 (file)
@@ -826,8 +826,6 @@ struct dpu_perf_cfg {
  * @mdss_irqs:         Bitmap with the irqs supported by the target
  */
 struct dpu_mdss_cfg {
-       u32 hwversion;
-
        const struct dpu_caps *caps;
 
        u32 mdp_count;
index c33e7ef..7d416bf 100644 (file)
@@ -61,7 +61,6 @@ static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
                        b->base_off = addr;
                        b->blk_off = m->ctl[i].base;
                        b->length = m->ctl[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_CTL;
                        return &m->ctl[i];
                }
index 4ad8991..6f20d6b 100644 (file)
@@ -169,7 +169,6 @@ static struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
                        b->base_off = addr;
                        b->blk_off = m->dsc[i].base;
                        b->length = m->dsc[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_DSC;
                        return &m->dsc[i];
                }
index 355894a..3e63bf4 100644 (file)
@@ -83,7 +83,6 @@ static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp,
                        b->base_off = addr;
                        b->blk_off = m->dspp[i].base;
                        b->length = m->dspp[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_DSPP;
                        return &m->dspp[i];
                }
index 61284e6..01bb2d8 100644 (file)
@@ -403,7 +403,6 @@ static void __intr_offset(struct dpu_mdss_cfg *m,
 {
        hw->base_off = addr;
        hw->blk_off = m->mdp[0].base;
-       hw->hwversion = m->hwversion;
 }
 
 struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
index 3f4d2c6..b2ca8d1 100644 (file)
@@ -80,7 +80,6 @@ static const struct dpu_intf_cfg *_intf_offset(enum dpu_intf intf,
                        b->base_off = addr;
                        b->blk_off = m->intf[i].base;
                        b->length = m->intf[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_INTF;
                        return &m->intf[i];
                }
index 25d2eba..b419932 100644 (file)
@@ -46,7 +46,6 @@ static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
                        b->base_off = addr;
                        b->blk_off = m->mixer[i].base;
                        b->length = m->mixer[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_LM;
                        return &m->mixer[i];
                }
index c06d595..b053d68 100644 (file)
@@ -26,7 +26,6 @@ static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
                        b->base_off = addr;
                        b->blk_off = m->merge_3d[i].base;
                        b->length = m->merge_3d[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_PINGPONG;
                        return &m->merge_3d[i];
                }
index 47c6ab6..6538e19 100644 (file)
@@ -54,7 +54,6 @@ static const struct dpu_pingpong_cfg *_pingpong_offset(enum dpu_pingpong pp,
                        b->base_off = addr;
                        b->blk_off = m->pingpong[i].base;
                        b->length = m->pingpong[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_PINGPONG;
                        return &m->pingpong[i];
                }
index 0a0864d..ab7f1a4 100644 (file)
@@ -772,7 +772,6 @@ static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
                                b->base_off = addr;
                                b->blk_off = catalog->sspp[i].base;
                                b->length = catalog->sspp[i].len;
-                               b->hwversion = catalog->hwversion;
                                b->log_mask = DPU_DBG_MASK_SSPP;
                                return &catalog->sspp[i];
                        }
index ab3ef16..12d3b00 100644 (file)
@@ -288,7 +288,6 @@ static const struct dpu_mdp_cfg *_top_offset(enum dpu_mdp mdp,
                        b->base_off = addr;
                        b->blk_off = m->mdp[i].base;
                        b->length = m->mdp[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_TOP;
                        return &m->mdp[i];
                }
index e4a65eb..550b2e2 100644 (file)
  * @blk_off:      pipe offset relative to mdss offset
  * @length        length of register block offset
  * @xin_id        xin id
- * @hwversion     mdss hw version number
  */
 struct dpu_hw_blk_reg_map {
        void __iomem *base_off;
        u32 blk_off;
        u32 length;
        u32 xin_id;
-       u32 hwversion;
        u32 log_mask;
 };
 
index 046854c..789ecc5 100644 (file)
@@ -223,7 +223,6 @@ static const struct dpu_vbif_cfg *_top_offset(enum dpu_vbif vbif,
                        b->base_off = addr;
                        b->blk_off = m->vbif[i].base;
                        b->length = m->vbif[i].len;
-                       b->hwversion = m->hwversion;
                        b->log_mask = DPU_DBG_MASK_VBIF;
                        return &m->vbif[i];
                }
index bcccce2..084439f 100644 (file)
@@ -63,7 +63,6 @@ static const struct dpu_wb_cfg *_wb_offset(enum dpu_wb wb,
                        b->base_off = addr;
                        b->blk_off = m->wb[i].base;
                        b->length = m->wb[i].len;
-                       b->hwversion = m->hwversion;
                        return &m->wb[i];
                }
        }