[ARC] Enhance enter/leave mnemonics.
authorClaudiu Zissulescu <claziss@synopsys.com>
Tue, 25 Apr 2017 15:07:00 +0000 (17:07 +0200)
committerclaziss <claziss@synopsys.com>
Tue, 25 Apr 2017 15:07:00 +0000 (17:07 +0200)
enter/leave mnemonics are enhanced to not only accept register ranges
but also single register (i.e., r13) or even no GPR register at all.

gas/
2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>

* testsuite/gas/arc/leave_enter.d: Update test.
* testsuite/gas/arc/leave_enter.s: Likewise.

opcodes/
2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>

* arc-dis.c (print_insn_arc): Smartly print enter/leave mnemonics.
* arc-opc.c (insert_r13el): New function.
(R13_EL): Define.
* arc-tbl.h: Add new enter/leave variants.

gas/ChangeLog
gas/testsuite/gas/arc/leave_enter.d
gas/testsuite/gas/arc/leave_enter.s
opcodes/ChangeLog
opcodes/arc-dis.c
opcodes/arc-opc.c
opcodes/arc-tbl.h

index 4be806e..ded300d 100644 (file)
@@ -1,5 +1,10 @@
 2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>
 
+       * testsuite/gas/arc/leave_enter.d: Update test.
+       * testsuite/gas/arc/leave_enter.s: Likewise.
+
+2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>
+
        * testsuite/gas/arc/b.d: Update test.
        * testsuite/gas/arc/noargs_hs.d: Likewise.
 
index 5eb1aef..821656a 100644 (file)
@@ -1,21 +1,30 @@
-#objdump: -dr
+#objdump: -dr --prefix-addresses --show-raw-insn
 
 .*: +file format .*arc.*
 
 
 Disassembly of section .text:
-
-[0-9a-f]+ <.text>:
-   0:  c0c2                    leave_s \[r13-r13\]
-   2:  c4dc                    leave_s \[r13-gp,pcl\]
-   4:  c1dc                    leave_s \[r13-gp,fp\]
-   6:  c2dc                    leave_s \[r13-gp,blink\]
-   8:  c3dc                    leave_s \[r13-gp,fp,blink\]
-   a:  c5dc                    leave_s \[r13-gp,fp,pcl\]
-   c:  c6dc                    leave_s \[r13-gp,blink,pcl\]
-   e:  c7dc                    leave_s \[r13-gp,fp,blink,pcl\]
-  10:  1100 0000               ld      r0,\[r1\]
-  14:  c0e2                    enter_s \[r13-r13\]
-  16:  c1fc                    enter_s \[r13-gp,fp\]
-  18:  c2fc                    enter_s \[r13-gp,blink\]
-  1a:  c3fc                    enter_s \[r13-gp,fp,blink\]
+0x[0-9a-f]+\s+c0c2\s+leave_s   \[r13\]
+0x[0-9a-f]+\s+c0c2\s+leave_s   \[r13\]
+0x[0-9a-f]+\s+c4dc\s+leave_s   \[r13-gp,pcl\]
+0x[0-9a-f]+\s+c1dc\s+leave_s   \[r13-gp,fp\]
+0x[0-9a-f]+\s+c2dc\s+leave_s   \[r13-gp,blink\]
+0x[0-9a-f]+\s+c3dc\s+leave_s   \[r13-gp,fp,blink\]
+0x[0-9a-f]+\s+c5dc\s+leave_s   \[r13-gp,fp,pcl\]
+0x[0-9a-f]+\s+c6dc\s+leave_s   \[r13-gp,blink,pcl\]
+0x[0-9a-f]+\s+c7dc\s+leave_s   \[r13-gp,fp,blink,pcl\]
+0x[0-9a-f]+\s+c6c2\s+leave_s   \[r13,blink,pcl\]
+0x[0-9a-f]+\s+c6c0\s+leave_s   \[blink,pcl\]
+0x[0-9a-f]+\s+c1c0\s+leave_s   \[fp\]
+0x[0-9a-f]+\s+c2c0\s+leave_s   \[blink\]
+0x[0-9a-f]+\s+c4c0\s+leave_s   \[pcl\]
+0x[0-9a-f]+\s+1100 0000\s+ld   r0,\[r1\]
+0x[0-9a-f]+\s+c0e2\s+enter_s   \[r13\]
+0x[0-9a-f]+\s+c0e2\s+enter_s   \[r13\]
+0x[0-9a-f]+\s+c1fc\s+enter_s   \[r13-gp,fp\]
+0x[0-9a-f]+\s+c2fc\s+enter_s   \[r13-gp,blink\]
+0x[0-9a-f]+\s+c3fc\s+enter_s   \[r13-gp,fp,blink\]
+0x[0-9a-f]+\s+c2e2\s+enter_s   \[r13,blink]
+0x[0-9a-f]+\s+c2e0\s+enter_s   \[blink\]
+0x[0-9a-f]+\s+c3e0\s+enter_s   \[fp,blink\]
+0x[0-9a-f]+\s+c1e0\s+enter_s   \[fp\]
index 1bdcc06..75cf913 100644 (file)
@@ -1,4 +1,5 @@
        .cpu HS
+       leave_s {r13}
        leave_s {r13-r13}
        leave_s {r13-r26,pcl}
        leave_s {r13-r26,fp}
@@ -7,10 +8,20 @@
        leave_s {r13-r26,fp,pcl}
        leave_s {r13-r26,blink,pcl}
        leave_s {r13-r26,fp,blink,pcl}
+       leave_s {r13,blink,pcl}
+       leave_s {blink,pcl}
+       leave_s {fp}
+       leave_s {blink}
+       leave_s {pcl}
 
        ld      r0,[r1]
 
+       enter_s {r13}
        enter_s {r13-r13}
        enter_s {r13-r26,fp}
        enter_s {r13-r26,blink}
        enter_s {r13-r26,fp,blink}
+       enter_s {r13,blink}
+       enter_s {blink}
+       enter_s {fp, blink}
+       enter_s {fp}
index 7076de5..b9d67d2 100644 (file)
@@ -1,5 +1,12 @@
 2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>
 
+       * arc-dis.c (print_insn_arc): Smartly print enter/leave mnemonics.
+       * arc-opc.c (insert_r13el): New function.
+       (R13_EL): Define.
+       * arc-tbl.h: Add new enter/leave variants.
+
+2017-04-25  Claudiu Zissulescu  <claziss@synopsys.com>
+
        * arc-tbl.h: Reorder NOP entry to be before MOV instructions.
 
 2017-04-25  Maciej W. Rozycki  <macro@imgtec.com>
index 4beca68..6fb030e 100644 (file)
@@ -1208,9 +1208,22 @@ print_insn_arc (bfd_vma memaddr,
          if (operand->flags & ARC_OPERAND_TRUNCATE
              && !(operand->flags & ARC_OPERAND_ALIGNED32)
              && !(operand->flags & ARC_OPERAND_ALIGNED16)
-             && value > 0 && value <= 14)
-           (*info->fprintf_func) (info->stream, "r13-%s",
-                                  regnames[13 + value - 1]);
+             && value >= 0 && value <= 14)
+           {
+             switch (value)
+               {
+               case 0:
+                 need_comma = FALSE;
+                 break;
+               case 1:
+                 (*info->fprintf_func) (info->stream, "r13");
+                 break;
+               default:
+                 (*info->fprintf_func) (info->stream, "r13-%s",
+                                        regnames[13 + value - 1]);
+                 break;
+               }
+           }
          else
            {
              const char *rname = get_auxreg (opcode, value, isa_mask);
index 41cd037..c266f4f 100644 (file)
@@ -546,6 +546,21 @@ extract_rrange (unsigned long long  insn,
 }
 
 static unsigned long long
+insert_r13el (unsigned long long insn,
+             long long int value,
+             const char **errmsg)
+{
+  if (value != 13)
+    {
+      *errmsg = _("Invalid register number, should be fp");
+      return insn;
+    }
+
+  insn |= 0x02;
+  return insn;
+}
+
+static unsigned long long
 insert_fpel (unsigned long long  insn,
             long long           value,
             const char **       errmsg)
@@ -1876,7 +1891,10 @@ const struct arc_operand arc_operands[] =
 #define RRANGE_EL      (ZA + 1)
   { 4, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK | ARC_OPERAND_TRUNCATE,
     insert_rrange, extract_rrange},
-#define FP_EL          (RRANGE_EL + 1)
+#define R13_EL         (RRANGE_EL + 1)
+  { 1, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_IGNORE | ARC_OPERAND_NCHK,
+    insert_r13el, extract_rrange },
+#define FP_EL          (R13_EL + 1)
   { 1, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_IGNORE | ARC_OPERAND_NCHK,
     insert_fpel, extract_fpel },
 #define BLINK_EL       (FP_EL + 1)
index 6b8a589..826b2ce 100644 (file)
 
 /* enter_s u6 110000UU111uuuu0.  */
 { "enter_s", 0x0000C0E0, 0x0000FCE1, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ENTER, CD1, { BRAKET, RRANGE_EL, FP_EL, BLINK_EL, BRAKETdup }, { 0 }},
+{ "enter_s", 0x0000C0E0, 0x0000FCE1, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ENTER, CD1, { BRAKET, R13_EL, FP_EL, BLINK_EL, BRAKETdup }, { 0 }},
 { "enter_s", 0x0000C0E0, 0x0000FCE1, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ENTER, CD1, { UIMM6_11_S }, { 0 }},
 
 /* ex<.di> b,c 00100bbb00101111DBBBCCCCCC001100.  */
 
 /* leave_s u7 11000UUU110uuuu0.  */
 { "leave_s", 0x0000C0C0, 0x0000F8E1, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LEAVE, CD1, { BRAKET, RRANGE_EL, FP_EL, BLINK_EL, PCL_EL, BRAKETdup }, { 0 }},
+{ "leave_s", 0x0000C0C0, 0x0000F8E1, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LEAVE, CD1, { BRAKET, R13_EL, FP_EL, BLINK_EL, PCL_EL, BRAKETdup }, { 0 }},
 { "leave_s", 0x0000C0C0, 0x0000F8E1, ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, LEAVE, CD1, { UIMM7_11_S }, { 0 }},
 
 /* llock<.di> b,c 00100bbb00101111DBBBCCCCCC010000.  */