Regenerate knownbits test. NFCI.

A future SimplifyDemandedBits patch will affect this code and I want to ensure the codegen diff is obvious.

llvm-svn: 348925

diff --git a/llvm/test/CodeGen/SystemZ/knownbits.ll b/llvm/test/CodeGen/SystemZ/knownbits.ll
index 703c0bf..f0f8465 100644 (file)
--- a/llvm/test/CodeGen/SystemZ/knownbits.ll
+++ b/llvm/test/CodeGen/SystemZ/knownbits.ll
@@ -1,16 +1,19 @@
-; Test that DAGCombiner gets helped by computeKnownBitsForTargetNode().
-;
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s  | FileCheck %s
 
+; Test that DAGCombiner gets helped by computeKnownBitsForTargetNode().
+
 ; SystemZISD::REPLICATE
 define i32 @f0() {
 ; CHECK-LABEL: f0:
-; CHECK-LABEL: # %bb.0:
-; CHECK:       vlgvf
-; CHECK-NOT:   lhi %r2, 0
-; CHECK-NOT:   chi %r0, 0
-; CHECK-NOT:   lochilh %r2, 1
-; CHECK: br %r14
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vgbm %v0, 0
+; CHECK-NEXT:    vceqf %v0, %v0, %v0
+; CHECK-NEXT:    vrepif %v1, 1
+; CHECK-NEXT:    vnc %v0, %v1, %v0
+; CHECK-NEXT:    vlgvf %r2, %v0, 3
+; CHECK-NEXT:    # kill: def $r2l killed $r2l killed $r2d
+; CHECK-NEXT:    br %r14
   %cmp0 = icmp ne <4 x i32> undef, zeroinitializer
   %zxt0 = zext <4 x i1> %cmp0 to <4 x i32>
   %ext0 = extractelement <4 x i32> %zxt0, i32 3
@@ -25,15 +28,26 @@ exit:
 }
 
 ; SystemZISD::JOIN_DWORDS (and REPLICATE)
-define void @f1() {
 ; The DAG XOR has JOIN_DWORDS and REPLICATE operands. With KnownBits properly set
 ; for both these nodes, ICMP is used instead of TM during lowering because
 ; adjustForRedundantAnd() succeeds.
+define void @f1() {
 ; CHECK-LABEL: f1:
-; CHECK-LABEL: # %bb.0:
-; CHECK-NOT:   tmll
-; CHECK-NOT:   jne
-; CHECK:       cijlh
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    clhhsi 0, 0
+; CHECK-NEXT:    lhi %r1, 0
+; CHECK-NEXT:    lochie %r1, 1
+; CHECK-NEXT:    lghi %r2, 1
+; CHECK-NEXT:    vlvgp %v0, %r1, %r2
+; CHECK-NEXT:    vrepig %v1, 1
+; CHECK-NEXT:    vx %v0, %v0, %v1
+; CHECK-NEXT:    vlgvf %r1, %v0, 1
+; CHECK-NEXT:    lhi %r0, 0
+; CHECK-NEXT:    cijlh %r1, 0, .LBB1_3
+; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:    cijlh %r0, 0, .LBB1_3
+; CHECK-NEXT:  # %bb.2:
+; CHECK-NEXT:  .LBB1_3:
   %1 = load i16, i16* null, align 2
   %2 = icmp eq i16 %1, 0
   %3 = insertelement <2 x i1> undef, i1 %2, i32 0