ARM64: dts: exynos5433: enable gscaller nodes
authorMarek Szyprowski <m.szyprowski@samsung.com>
Fri, 17 Apr 2015 08:35:46 +0000 (10:35 +0200)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Wed, 14 Dec 2016 04:43:57 +0000 (13:43 +0900)
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
arch/arm64/boot/dts/exynos/exynos5433.dtsi

index 2399e2a..400b09c 100644 (file)
 
        interrupt-parent = <&gic>;
 
+       aliases {
+               gsc0 = &gsc_0;
+               gsc1 = &gsc_1;
+               gsc2 = &gsc_2;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
                        samsung,pmu-syscon = <&pmu_system_controller>;
                };
 
+               gsc_0: video-scaler@13C00000 {
+                       compatible = "samsung,exynos5433-gsc";
+                       reg = <0x13c00000 0x1000>;
+                       interrupts = <0 297 0>;
+                       clocks = <&cmu_gscl CLK_PCLK_GSCL0>,
+                                <&cmu_gscl CLK_ACLK_GSCL0>,
+                                <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
+                                <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
+                       clock-names = "pclk",
+                                     "aclk",
+                                     "aclk_xiu",
+                                     "aclk_gsclbend";
+                       assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
+                                         <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
+                       assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
+                                                <&cmu_top CLK_ACLK_GSCL_333>;
+               };
+
+               gsc_1: video-scaler@13C10000 {
+                       compatible = "samsung,exynos5433-gsc";
+                       reg = <0x13c10000 0x1000>;
+                       interrupts = <0 298 0>;
+                       clocks = <&cmu_gscl CLK_PCLK_GSCL1>,
+                                <&cmu_gscl CLK_ACLK_GSCL1>,
+                                <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
+                                <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
+                       clock-names = "pclk",
+                                     "aclk",
+                                     "aclk_xiu",
+                                     "aclk_gsclbend";
+                       assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
+                                         <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
+                       assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
+                                                <&cmu_top CLK_ACLK_GSCL_333>;
+               };
+
+               gsc_2: video-scaler@13C20000 {
+                       compatible = "samsung,exynos5433-gsc";
+                       reg = <0x13c20000 0x1000>;
+                       interrupts = <0 299 0>;
+                       clocks = <&cmu_gscl CLK_PCLK_GSCL2>,
+                                <&cmu_gscl CLK_ACLK_GSCL2>,
+                                <&cmu_gscl CLK_ACLK_XIU_GSCLX>,
+                                <&cmu_gscl CLK_ACLK_GSCLBEND_333>;
+                       clock-names = "pclk",
+                                     "aclk",
+                                     "aclk_xiu",
+                                     "aclk_gsclbend";
+                       assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
+                                         <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
+                       assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
+                                                <&cmu_top CLK_ACLK_GSCL_333>;
+               };
+
                sysmmu_decon0x: sysmmu@0x13A00000 {
                        compatible = "samsung,exynos-sysmmu";
                        reg = <0x13A00000 0x1000>;