clk: qcom: camcc-sdm845: Fix topology around titan_top power domain

[ Upstream commit 103dd2338bbff567bce7acd00fc5a09c806b38ec ]

On SDM845 two found VFE GDSC power domains shall not be operated, if
titan top is turned off, thus the former power domains will be set as
subdomains by a GDSC registration routine.

Fixes: 78412c262004 ("clk: qcom: Add camera clock controller driver for SDM845")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220519214133.1728979-2-vladimir.zapolskiy@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/qcom/camcc-sdm845.c b/drivers/clk/qcom/camcc-sdm845.c
index 1b2cefe..a8a2cfa 100644 (file)
--- a/drivers/clk/qcom/camcc-sdm845.c
+++ b/drivers/clk/qcom/camcc-sdm845.c
@@ -1521,6 +1521,8 @@ static struct clk_branch cam_cc_sys_tmr_clk = {
        },
 };
 
+static struct gdsc titan_top_gdsc;
+
 static struct gdsc bps_gdsc = {
        .gdscr = 0x6004,
        .pd = {
@@ -1554,6 +1556,7 @@ static struct gdsc ife_0_gdsc = {
                .name = "ife_0_gdsc",
        },
        .flags = POLL_CFG_GDSCR,
+       .parent = &titan_top_gdsc.pd,
        .pwrsts = PWRSTS_OFF_ON,
 };
 
@@ -1563,6 +1566,7 @@ static struct gdsc ife_1_gdsc = {
                .name = "ife_1_gdsc",
        },
        .flags = POLL_CFG_GDSCR,
+       .parent = &titan_top_gdsc.pd,
        .pwrsts = PWRSTS_OFF_ON,
 };