x86: Move cache-as-RAM code into a common location
authorSimon Glass <sjg@chromium.org>
Sat, 12 Mar 2016 05:06:53 +0000 (22:06 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Thu, 17 Mar 2016 02:27:24 +0000 (10:27 +0800)
This cache-as-RAM (CAR) code is common to several Intel chips. Create a new
intel_common directory and move it in there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/cpu/Makefile
arch/x86/cpu/intel_common/Makefile [new file with mode: 0644]
arch/x86/cpu/intel_common/car.S [moved from arch/x86/cpu/ivybridge/car.S with 100% similarity]
arch/x86/cpu/ivybridge/Makefile

index 2ff2377..2583809 100644 (file)
@@ -18,6 +18,7 @@ AFLAGS_call32.o := -fpic -fshort-wchar
 
 extra-y += call32.o
 
+obj-y += intel_common/
 obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
 obj-$(CONFIG_SYS_COREBOOT) += coreboot/
 obj-$(CONFIG_EFI_APP) += efi/
diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile
new file mode 100644 (file)
index 0000000..5dd9573
--- /dev/null
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2016 Google, Inc
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-$(CONFIG_HAVE_MRC) += car.o
index 9203219..b117f0d 100644 (file)
@@ -7,7 +7,6 @@
 ifdef CONFIG_HAVE_FSP
 obj-y += fsp_configs.o ivybridge.o
 else
-obj-y += car.o
 obj-y += cpu.o
 obj-y += early_me.o
 obj-y += gma.o