drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines

Kill the silly DRAIN_LATENCY_PRECISION_* defines and just use the raw
number instead.

v2: Move the sprite 32/16 -> 16/8 preision multiplier
    change to another patch (Jesse)

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1e5ce1b..b0bcb04 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4205,10 +4205,6 @@ enum skl_disp_power_wells {
 #define   DSPFW_PLANEA_WM1_HI_MASK     (1<<0)
 
 /* drain latency register values*/
-#define DRAIN_LATENCY_PRECISION_8      8
-#define DRAIN_LATENCY_PRECISION_16     16
-#define DRAIN_LATENCY_PRECISION_32     32
-#define DRAIN_LATENCY_PRECISION_64     64
 #define VLV_DDL(pipe)                  (VLV_DISPLAY_BASE + 0x70050 + 4 * (pipe))
 #define DDL_CURSOR_PRECISION_HIGH      (1<<31)
 #define DDL_CURSOR_PRECISION_LOW       (0<<31)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 94cc4b6..cc3c2d9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -756,11 +756,9 @@ static bool vlv_compute_drain_latency(struct drm_crtc *crtc,
 
        entries = DIV_ROUND_UP(clock, 1000) * pixel_size;
        if (IS_CHERRYVIEW(dev))
-               *prec_mult = (entries > 32) ? DRAIN_LATENCY_PRECISION_16 :
-                                             DRAIN_LATENCY_PRECISION_8;
+               *prec_mult = (entries > 32) ? 16 : 8;
        else
-               *prec_mult = (entries > 128) ? DRAIN_LATENCY_PRECISION_64 :
-                                              DRAIN_LATENCY_PRECISION_32;
+               *prec_mult = (entries > 128) ? 64 : 32;
        *drain_latency = (64 * (*prec_mult) * 4) / entries;
 
        if (*drain_latency > DRAIN_LATENCY_MASK)
@@ -786,8 +784,7 @@ static void vlv_update_drain_latency(struct drm_crtc *crtc)
        int drain_latency;
        enum pipe pipe = intel_crtc->pipe;
        int plane_prec, prec_mult, plane_dl;
-       const int high_precision = IS_CHERRYVIEW(dev) ?
-               DRAIN_LATENCY_PRECISION_16 : DRAIN_LATENCY_PRECISION_64;
+       const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
 
        plane_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_PLANE_PRECISION_HIGH |
                   DRAIN_LATENCY_MASK | DDL_CURSOR_PRECISION_HIGH |
@@ -985,8 +982,7 @@ static void valleyview_update_sprite_wm(struct drm_plane *plane,
        int plane_prec;
        int sprite_dl;
        int prec_mult;
-       const int high_precision = IS_CHERRYVIEW(dev) ?
-               DRAIN_LATENCY_PRECISION_16 : DRAIN_LATENCY_PRECISION_64;
+       const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
 
        sprite_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_SPRITE_PRECISION_HIGH(sprite) |
                    (DRAIN_LATENCY_MASK << DDL_SPRITE_SHIFT(sprite)));