drm/amd/display: Fix no-DCN build
authorHarry Wentland <harry.wentland@amd.com>
Mon, 13 Feb 2023 20:17:29 +0000 (15:17 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 7 Mar 2023 19:22:39 +0000 (14:22 -0500)
[Why & How]
This fixes a couple misplaced CONFIG_DRM_AMD_DC_DCN
blocks.

Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

index e10ed293597124ddb9fff043ebac6d9a28fe2765..19721941b0693ad7b989fe958c9723bdbea1f06c 100644 (file)
@@ -1427,6 +1427,7 @@ static unsigned int kbps_from_pbn(unsigned int pbn)
 static bool is_dsc_common_config_possible(struct dc_stream_state *stream,
                                          struct dc_dsc_bw_range *bw_range)
 {
+#if defined(CONFIG_DRM_AMD_DC_DCN)
        struct dc_dsc_policy dsc_policy = {0};
 
        dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy);
@@ -1438,6 +1439,8 @@ static bool is_dsc_common_config_possible(struct dc_stream_state *stream,
                                       &stream->timing, bw_range);
 
        return bw_range->max_target_bpp_x16 && bw_range->min_target_bpp_x16;
+#endif
+       return false;
 }
 #endif /* CONFIG_DRM_AMD_DC_DCN */