arm: dts: owl-s500: Set CMU clocks for UARTs
authorCristian Ciocaltea <cristian.ciocaltea@gmail.com>
Tue, 29 Dec 2020 21:17:17 +0000 (23:17 +0200)
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Thu, 31 Dec 2020 07:35:06 +0000 (13:05 +0530)
Set Clock Management Unit clocks for the UART nodes of Actions Semi
S500 SoCs and remove the dummy "uart2_clk" and "uart3_clk" fixed clocks.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
arch/arm/boot/dts/owl-s500-cubieboard6.dts
arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts
arch/arm/boot/dts/owl-s500-labrador-base-m.dts
arch/arm/boot/dts/owl-s500-roseapplepi.dts
arch/arm/boot/dts/owl-s500-sparky.dts
arch/arm/boot/dts/owl-s500.dtsi

index 7c96c59b610d19d069975bbf9b9289f438cb6843..c2b02895910c55ff760974eacd50a2911177964d 100644 (file)
                device_type = "memory";
                reg = <0x0 0x80000000>;
        };
-
-       uart3_clk: uart3-clk {
-               compatible = "fixed-clock";
-               clock-frequency = <921600>;
-               #clock-cells = <0>;
-       };
 };
 
 &timer {
@@ -39,5 +33,4 @@
 
 &uart3 {
        status = "okay";
-       clocks = <&uart3_clk>;
 };
index e610d49395d261380cfa94d145f4777d70904eb0..7ae34a23e320d554b933e1b4e28b704d8f656df1 100644 (file)
        chosen {
                stdout-path = "serial3:115200n8";
        };
-
-       uart3_clk: uart3-clk {
-               compatible = "fixed-clock";
-               clock-frequency = <921600>;
-               #clock-cells = <0>;
-       };
 };
 
 &uart3 {
        status = "okay";
-       clocks = <&uart3_clk>;
 };
index c92f8bdcb33104577bc3292b6dc02ccf69f66f4d..1585e33f703baec8d25b498f5e9af550156fb211 100644 (file)
        chosen {
                stdout-path = "serial3:115200n8";
        };
-
-       uart3_clk: uart3-clk {
-               compatible = "fixed-clock";
-               clock-frequency = <921600>;
-               #clock-cells = <0>;
-       };
 };
 
 &uart3 {
        status = "okay";
-       clocks = <&uart3_clk>;
 };
index a2087e617cb2a738e61f917662834da8500b2da5..800edf5d2d12dceb3685c6edac1a43987b1214ab 100644 (file)
                device_type = "memory";
                reg = <0x0 0x80000000>; /* 2GB */
        };
-
-       uart2_clk: uart2-clk {
-               compatible = "fixed-clock";
-               clock-frequency = <921600>;
-               #clock-cells = <0>;
-       };
 };
 
 &twd_timer {
@@ -43,5 +37,4 @@
 
 &uart2 {
        status = "okay";
-       clocks = <&uart2_clk>;
 };
index c665ce8b88b4736a803d37c4ae07154934370fe6..9d8f7336bec04f0ef44874e8ea92dcb62dbca09a 100644 (file)
                device_type = "memory";
                reg = <0x0 0x40000000>; /* 1 or 2 GiB */
        };
-
-       uart3_clk: uart3-clk {
-               compatible = "fixed-clock";
-               clock-frequency = <921600>;
-               #clock-cells = <0>;
-       };
 };
 
 &timer {
@@ -39,5 +33,4 @@
 
 &uart3 {
        status = "okay";
-       clocks = <&uart3_clk>;
 };
index 5d5ad9db549b8b8217a738d84dfb2f2d0628491f..ac3d04c75dd5523cca09ebc9bf5d7756c3d48d7d 100644 (file)
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0120000 0x2000>;
                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART0>;
                        status = "disabled";
                };
 
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0122000 0x2000>;
                        interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART1>;
                        status = "disabled";
                };
 
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0124000 0x2000>;
                        interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART2>;
                        status = "disabled";
                };
 
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0126000 0x2000>;
                        interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART3>;
                        status = "disabled";
                };
 
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb0128000 0x2000>;
                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART4>;
                        status = "disabled";
                };
 
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb012a000 0x2000>;
                        interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART5>;
                        status = "disabled";
                };
 
                        compatible = "actions,s500-uart", "actions,owl-uart";
                        reg = <0xb012c000 0x2000>;
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cmu CLK_UART6>;
                        status = "disabled";
                };