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arm64: dts: renesas: gen3: use 400kHz for I2C DVFS bus
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Tue, 18 Sep 2018 09:14:33 +0000 (11:14 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Wed, 19 Sep 2018 09:07:14 +0000 (11:07 +0200)
The PMIC and EEPROM can operate at 400kHz, so use this speed.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/salvator-common.dtsi patch | blob | history
arch/arm64/boot/dts/renesas/ulcb.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index d298f7c..7f91ff5 100644 (file)
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -474,6 +474,8 @@
 &i2c_dvfs {
        status = "okay";
 
+       clock-frequency = <400000>;
+
        pmic: pmic@30 {
                pinctrl-0 = <&irq0_pins>;
                pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 7e60785..30506c5 100644 (file)
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -241,6 +241,8 @@
 &i2c_dvfs {
        status = "okay";
 
+       clock-frequency = <400000>;
+
        pmic: pmic@30 {
                pinctrl-0 = <&irq0_pins>;
                pinctrl-names = "default";
Domain: System / Kernel;