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mmc: sdhci-esdhc-imx: fix the mask for tuning start point
author
Haibo Chen
<haibo.chen@nxp.com>
Tue, 26 May 2020 10:22:01 +0000
(18:22 +0800)
committer
Ulf Hansson
<ulf.hansson@linaro.org>
Fri, 29 May 2020 10:38:00 +0000
(12:38 +0200)
According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is
TUNING_START_TAP, bit[7] of this register is to disable the command
CRC check for standard tuning. So fix it here.
Fixes:
d87fc9663688
("mmc: sdhci-esdhc-imx: support setting tuning start point")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Link:
https://lore.kernel.org/r/1590488522-9292-1-git-send-email-haibo.chen@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-esdhc-imx.c
patch
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diff --git
a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index
5a27511
..
37d4667
100644
(file)
--- a/
drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/
drivers/mmc/host/sdhci-esdhc-imx.c
@@
-90,7
+90,7
@@
#define ESDHC_STD_TUNING_EN (1 << 24)
/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
#define ESDHC_TUNING_START_TAP_DEFAULT 0x1
-#define ESDHC_TUNING_START_TAP_MASK 0x
f
f
+#define ESDHC_TUNING_START_TAP_MASK 0x
7
f
#define ESDHC_TUNING_STEP_MASK 0x00070000
#define ESDHC_TUNING_STEP_SHIFT 16