arm64: dts: renesas: r8a77980: use SYSC power domain macros
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Thu, 26 Apr 2018 10:45:21 +0000 (13:45 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Wed, 16 May 2018 08:45:18 +0000 (10:45 +0200)
Now that the commit 7755b40d07a8 ("dt-bindings: power: add R8A77980 SYSC
power domain definitions") has hit Linus' tree, we can replace  the bare
numbers (we had to use to avoid a cross tree dependency) with these macro
definitions...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a77980.dtsi

index fddbaf2..5c865fc 100644 (file)
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77980-sysc.h>
 
 / {
        compatible = "renesas,r8a77980";
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0>;
                        clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
-                       power-domains = <&sysc 5>;
+                       power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
                };
 
                L2_CA53: cache-controller {
                        compatible = "cache";
-                       power-domains = <&sysc 21>;
+                       power-domains = <&sysc R8A77980_PD_CA53_SCU>;
                        cache-unified;
                        cache-level = <2>;
                };
                        dmas = <&dmac1 0x31>, <&dmac1 0x30>,
                               <&dmac2 0x31>, <&dmac2 0x30>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 520>;
                        status = "disabled";
                };
                        dmas = <&dmac1 0x33>, <&dmac1 0x32>,
                               <&dmac2 0x33>, <&dmac2 0x32>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 519>;
                        status = "disabled";
                };
                        dmas = <&dmac1 0x35>, <&dmac1 0x34>,
                               <&dmac2 0x35>, <&dmac2 0x34>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 518>;
                        status = "disabled";
                };
                        dmas = <&dmac1 0x37>, <&dmac1 0x36>,
                               <&dmac2 0x37>, <&dmac2 0x36>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 517>;
                        status = "disabled";
                };
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
                        #address-cells = <1>;
                        dmas = <&dmac1 0x51>, <&dmac1 0x50>,
                               <&dmac2 0x51>, <&dmac2 0x50>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 207>;
                        status = "disabled";
                };
                        dmas = <&dmac1 0x53>, <&dmac1 0x52>,
                               <&dmac2 0x53>, <&dmac2 0x52>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 206>;
                        status = "disabled";
                };
                        dmas = <&dmac1 0x57>, <&dmac1 0x56>,
                               <&dmac2 0x57>, <&dmac2 0x56>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 204>;
                        status = "disabled";
                };
                        dmas = <&dmac1 0x59>, <&dmac1 0x58>,
                               <&dmac2 0x59>, <&dmac2 0x58>;
                        dma-names = "tx", "rx", "tx", "rx";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 203>;
                        status = "disabled";
                };
                                          "ch12", "ch13", "ch14", "ch15";
                        clocks = <&cpg CPG_MOD 218>;
                        clock-names = "fck";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 218>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
                                          "ch12", "ch13", "ch14", "ch15";
                        clocks = <&cpg CPG_MOD 217>;
                        clock-names = "fck";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 217>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
                        reg = <0 0xee140000 0 0x2000>;
                        interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 314>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 314>;
                        max-frequency = <200000000>;
                        status = "disabled";
                                      IRQ_TYPE_LEVEL_HIGH)>;
                        clocks = <&cpg CPG_MOD 408>;
                        clock-names = "clk";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 408>;
                };