clk: keystone: pll: Unmap region obtained by of_iomap
authorArvind Yadav <arvind.yadav.cs@gmail.com>
Tue, 20 Sep 2016 11:46:55 +0000 (17:16 +0530)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 9 Dec 2016 00:34:15 +0000 (16:34 -0800)
Free memory mapping, if of_pll_div_clk_init is not successful.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/keystone/pll.c

index 185f19c..e7e840f 100644 (file)
@@ -267,25 +267,30 @@ static void __init of_pll_div_clk_init(struct device_node *node)
        parent_name = of_clk_get_parent_name(node, 0);
        if (!parent_name) {
                pr_err("%s: missing parent clock\n", __func__);
+               iounmap(reg);
                return;
        }
 
        if (of_property_read_u32(node, "bit-shift", &shift)) {
                pr_err("%s: missing 'shift' property\n", __func__);
+               iounmap(reg);
                return;
        }
 
        if (of_property_read_u32(node, "bit-mask", &mask)) {
                pr_err("%s: missing 'bit-mask' property\n", __func__);
+               iounmap(reg);
                return;
        }
 
        clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift,
                                 mask, 0, NULL);
-       if (clk)
+       if (clk) {
                of_clk_add_provider(node, of_clk_src_simple_get, clk);
-       else
+       } else {
                pr_err("%s: error registering divider %s\n", __func__, clk_name);
+               iounmap(reg);
+       }
 }
 CLK_OF_DECLARE(pll_divider_clock, "ti,keystone,pll-divider-clock", of_pll_div_clk_init);