winsys/radeon: better explain the num_tile_pipes fixup for TAHITI (v2)
authorAlexandre Demers <alexandre.f.demers@gmail.com>
Wed, 10 Feb 2016 14:45:46 +0000 (09:45 -0500)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 10 Feb 2016 18:29:41 +0000 (19:29 +0100)
v2: Clarify the relation between num_tiles_pipes and GB_TILE_MODE and the fix
 needed for Tahiti as suggested by Marek.

Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c

index 49c310c..73ef051 100644 (file)
@@ -405,8 +405,10 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
             radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
                                  &ws->info.num_tile_pipes);
 
-            /* The kernel returns 12 for some cards for an unknown reason.
-             * I thought this was supposed to be a power of two.
+            /* "num_tiles_pipes" must be equal to the number of pipes (Px) in the
+            /* pipe config field of the GB_TILE_MODE array. Only one card (Tahiti)
+            /* reports a different value (12). Fix it by setting what's in the
+            /* GB_TILE_MODE array (8).
              */
             if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
                 ws->info.num_tile_pipes = 8;