amd/common: add AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32 property

This property can be used to determine wave size on gfx10+.

Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24920>

diff --git a/src/amd/common/amd_kernel_code_t.h b/src/amd/common/amd_kernel_code_t.h
index f3e6c3d..05767d5 100644 (file)
--- a/src/amd/common/amd_kernel_code_t.h
+++ b/src/amd/common/amd_kernel_code_t.h
@@ -102,10 +102,16 @@ enum amd_code_property_mask_t
       ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z_WIDTH) - 1)
       << AMD_CODE_PROPERTY_ENABLE_SGPR_GRID_WORKGROUP_COUNT_Z_SHIFT,
 
-   AMD_CODE_PROPERTY_RESERVED1_SHIFT = 10,
-   AMD_CODE_PROPERTY_RESERVED1_WIDTH = 6,
+   AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32_SHIFT = 10,
+   AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32_WIDTH = 1,
+   AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32 =
+      ((1 << AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32_WIDTH) - 1)
+      << AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32_SHIFT,
+
+   AMD_CODE_PROPERTY_RESERVED1_SHIFT = 11,
+   AMD_CODE_PROPERTY_RESERVED1_WIDTH = 5,
    AMD_CODE_PROPERTY_RESERVED1 = ((1 << AMD_CODE_PROPERTY_RESERVED1_WIDTH) - 1)
-                                 << AMD_CODE_PROPERTY_RESERVED1_SHIFT,
+      << AMD_CODE_PROPERTY_RESERVED1_SHIFT,
 
    /* Control wave ID base counter for GDS ordered-append. Used to set
     * COMPUTE_DISPATCH_INITIATOR.ORDERED_APPEND_ENBL. (Not sure if