drm/amdgpu: note what type of reset we are using
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 11 Aug 2020 16:02:21 +0000 (12:02 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Aug 2020 21:03:20 +0000 (17:03 -0400)
When we reset the GPU, note what type of reset will be
used.  This makes debugging different reset scenarios
more clear as the driver may use different reset
methods depending on conditions on the system.

Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/cik.c
drivers/gpu/drm/amd/amdgpu/nv.c
drivers/gpu/drm/amd/amdgpu/si.c
drivers/gpu/drm/amd/amdgpu/soc15.c
drivers/gpu/drm/amd/amdgpu/vi.c

index c2c67ab..7e71ffb 100644 (file)
@@ -1366,8 +1366,10 @@ static int cik_asic_reset(struct amdgpu_device *adev)
        int r;
 
        if (cik_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
+               dev_info(adev->dev, "BACO reset\n");
                r = amdgpu_dpm_baco_reset(adev);
        } else {
+               dev_info(adev->dev, "PCI CONFIG reset\n");
                r = cik_asic_pci_config_reset(adev);
        }
 
index da8024c..54e941e 100644 (file)
@@ -379,7 +379,7 @@ static int nv_asic_reset(struct amdgpu_device *adev)
        struct smu_context *smu = &adev->smu;
 
        if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
-               dev_info(adev->dev, "GPU BACO reset\n");
+               dev_info(adev->dev, "BACO reset\n");
 
                ret = smu_baco_enter(smu);
                if (ret)
@@ -387,8 +387,10 @@ static int nv_asic_reset(struct amdgpu_device *adev)
                ret = smu_baco_exit(smu);
                if (ret)
                        return ret;
-       } else
+       } else {
+               dev_info(adev->dev, "MODE1 reset\n");
                ret = nv_asic_mode1_reset(adev);
+       }
 
        return ret;
 }
index e330884..eaa2f07 100644 (file)
@@ -1302,6 +1302,8 @@ static int si_asic_reset(struct amdgpu_device *adev)
 {
        int r;
 
+       dev_info(adev->dev, "PCI CONFIG reset\n");
+
        amdgpu_atombios_scratch_regs_engine_hung(adev, true);
 
        r = si_gpu_pci_config_reset(adev);
index 84d811b..3cd98c1 100644 (file)
@@ -580,10 +580,13 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
 
        switch (soc15_asic_reset_method(adev)) {
                case AMD_RESET_METHOD_BACO:
+                       dev_info(adev->dev, "BACO reset\n");
                        return soc15_asic_baco_reset(adev);
                case AMD_RESET_METHOD_MODE2:
+                       dev_info(adev->dev, "MODE2 reset\n");
                        return amdgpu_dpm_mode2_reset(adev);
                default:
+                       dev_info(adev->dev, "MODE1 reset\n");
                        return soc15_asic_mode1_reset(adev);
        }
 }
index b4e4a7a..a92880c 100644 (file)
@@ -752,8 +752,10 @@ static int vi_asic_reset(struct amdgpu_device *adev)
        int r;
 
        if (vi_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
+               dev_info(adev->dev, "BACO reset\n");
                r = amdgpu_dpm_baco_reset(adev);
        } else {
+               dev_info(adev->dev, "PCI CONFIG reset\n");
                r = vi_asic_pci_config_reset(adev);
        }