MIPS: set mips32r5 for virt extensions

[ Upstream commit c994a3ec7ecc8bd2a837b2061e8a76eb8efc082b ]

Clang's integrated assembler only accepts these instructions when the
cpu is set to mips32r5. With this change, we can assemble
malta_defconfig with Clang via `make LLVM_IAS=1`.

Link: https://github.com/ClangBuiltLinux/linux/issues/763
Reported-by: Dmitry Golovin <dima@golovin.in>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index a0e8ae5..7a7467d 100644 (file)
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -2073,7 +2073,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
 ({ int __res;                                                          \
        __asm__ __volatile__(                                           \
                ".set\tpush\n\t"                                        \
-               ".set\tmips32r2\n\t"                                    \
+               ".set\tmips32r5\n\t"                                    \
                _ASM_SET_VIRT                                           \
                "mfgc0\t%0, " #source ", %1\n\t"                        \
                ".set\tpop"                                             \
@@ -2086,7 +2086,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
 ({ unsigned long long __res;                                           \
        __asm__ __volatile__(                                           \
                ".set\tpush\n\t"                                        \
-               ".set\tmips64r2\n\t"                                    \
+               ".set\tmips64r5\n\t"                                    \
                _ASM_SET_VIRT                                           \
                "dmfgc0\t%0, " #source ", %1\n\t"                       \
                ".set\tpop"                                             \
@@ -2099,7 +2099,7 @@ _ASM_MACRO_0(tlbginvf, _ASM_INSN_IF_MIPS(0x4200000c)
 do {                                                                   \
        __asm__ __volatile__(                                           \
                ".set\tpush\n\t"                                        \
-               ".set\tmips32r2\n\t"                                    \
+               ".set\tmips32r5\n\t"                                    \
                _ASM_SET_VIRT                                           \
                "mtgc0\t%z0, " #register ", %1\n\t"                     \
                ".set\tpop"                                             \
@@ -2111,7 +2111,7 @@ do {                                                                      \
 do {                                                                   \
        __asm__ __volatile__(                                           \
                ".set\tpush\n\t"                                        \
-               ".set\tmips64r2\n\t"                                    \
+               ".set\tmips64r5\n\t"                                    \
                _ASM_SET_VIRT                                           \
                "dmtgc0\t%z0, " #register ", %1\n\t"                    \
                ".set\tpop"                                             \