ARM: dts: append DTS file of pxa168
authorHaojian Zhuang <haojian.zhuang@marvell.com>
Thu, 1 Mar 2012 05:26:15 +0000 (13:26 +0800)
committerHaojian Zhuang <haojian.zhuang@gmail.com>
Wed, 7 Mar 2012 01:32:40 +0000 (09:32 +0800)
DTS files of both PXA168 and aspenite are appended.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/pxa168-aspenite.dts [new file with mode: 0644]
arch/arm/boot/dts/pxa168.dtsi [new file with mode: 0644]

diff --git a/arch/arm/boot/dts/pxa168-aspenite.dts b/arch/arm/boot/dts/pxa168-aspenite.dts
new file mode 100644 (file)
index 0000000..e762fac
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ *  Copyright (C) 2012 Marvell Technology Group Ltd.
+ *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/include/ "pxa168.dtsi"
+
+/ {
+       model = "Marvell PXA168 Aspenite Development Board";
+       compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
+
+       chosen {
+               bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
+       };
+
+       memory {
+               reg = <0x00000000 0x04000000>;
+       };
+
+       soc {
+               apb@d4000000 {
+                       uart1: uart@d4017000 {
+                               status = "okay";
+                       };
+                       twsi1: i2c@d4011000 {
+                               status = "okay";
+                       };
+                       rtc: rtc@d4010000 {
+                               status = "okay";
+                       };
+               };
+       };
+};
diff --git a/arch/arm/boot/dts/pxa168.dtsi b/arch/arm/boot/dts/pxa168.dtsi
new file mode 100644 (file)
index 0000000..d32d512
--- /dev/null
@@ -0,0 +1,98 @@
+/*
+ *  Copyright (C) 2012 Marvell Technology Group Ltd.
+ *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+       aliases {
+               serial0 = &uart1;
+               serial1 = &uart2;
+               serial2 = &uart3;
+               i2c0 = &twsi1;
+               i2c1 = &twsi2;
+       };
+
+       intc: intc-interrupt-controller@d4282000 {
+               compatible = "mrvl,mmp-intc", "mrvl,intc";
+               interrupt-controller;
+               #interrupt-cells = <1>;
+               reg = <0xd4282000 0x1000>;
+       };
+
+       soc {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "simple-bus";
+               interrupt-parent = <&intc>;
+               ranges;
+
+               apb@d4000000 {  /* APB */
+                       compatible = "mrvl,apb-bus", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0xd4000000 0x00200000>;
+                       ranges;
+
+                       uart1: uart@d4017000 {
+                               compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
+                               reg = <0xd4017000 0x1000>;
+                               interrupts = <27>;
+                               status = "disabled";
+                       };
+
+                       uart2: uart@d4018000 {
+                               compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
+                               reg = <0xd4018000 0x1000>;
+                               interrupts = <28>;
+                               status = "disabled";
+                       };
+
+                       uart3: uart@d4026000 {
+                               compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
+                               reg = <0xd4026000 0x1000>;
+                               interrupts = <29>;
+                               status = "disabled";
+                       };
+
+                       gpio: gpio@d4019000 {
+                               compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
+                               reg = <0xd4019000 0x1000>;
+                               interrupts = <49>;
+                               interrupt-names = "gpio_mux";
+                               gpio-controller;
+                               #gpio-cells = <1>;
+                               interrupt-controller;
+                               #interrupt-cells = <1>;
+                       };
+
+                       twsi1: i2c@d4011000 {
+                               compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+                               reg = <0xd4011000 0x1000>;
+                               interrupts = <7>;
+                               mrvl,i2c-fast-mode;
+                               status = "disabled";
+                       };
+
+                       twsi2: i2c@d4025000 {
+                               compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
+                               reg = <0xd4025000 0x1000>;
+                               interrupts = <58>;
+                               status = "disabled";
+                       };
+
+                       rtc: rtc@d4010000 {
+                               compatible = "mrvl,mmp-rtc";
+                               reg = <0xd4010000 0x1000>;
+                               interrupts = <5 6>;
+                               interrupt-names = "rtc 1Hz", "rtc alarm";
+                               status = "disabled";
+                       };
+               };
+       };
+};