i965: Respect the no_8 flag on Gen4-5.

This flag means to ignore the SIMD8 program and only use the SIMD16 one.
It was originally meant for repdata clear shaders, but I plan to use it
for other things on Gen4 as well.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c
index afb4ebf..28a4aa4 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_state.c
@@ -95,23 +95,40 @@ brw_upload_wm_unit(struct brw_context *brw)
    }
 
    /* BRW_NEW_PROGRAM_CACHE | BRW_NEW_FS_PROG_DATA */
-   wm->thread0.grf_reg_count = prog_data->reg_blocks;
-   wm->wm9.grf_reg_count_2 = prog_data->reg_blocks_16;
-
-   wm->thread0.kernel_start_pointer =
-      brw_program_reloc(brw,
-                       brw->wm.base.state_offset +
-                       offsetof(struct brw_wm_unit_state, thread0),
-                       brw->wm.base.prog_offset +
-                       (wm->thread0.grf_reg_count << 1)) >> 6;
-
-   wm->wm9.kernel_start_pointer_2 =
-      brw_program_reloc(brw,
-                       brw->wm.base.state_offset +
-                       offsetof(struct brw_wm_unit_state, wm9),
-                       brw->wm.base.prog_offset +
-                       prog_data->prog_offset_16 +
-                       (wm->wm9.grf_reg_count_2 << 1)) >> 6;
+   if (prog_data->no_8) {
+      wm->wm5.enable_16_pix = 1;
+      wm->thread0.grf_reg_count = prog_data->reg_blocks_16;
+      wm->thread0.kernel_start_pointer =
+         brw_program_reloc(brw,
+                           brw->wm.base.state_offset +
+                           offsetof(struct brw_wm_unit_state, thread0),
+                           brw->wm.base.prog_offset +
+                           prog_data->prog_offset_16 +
+                           (prog_data->reg_blocks_16 << 1)) >> 6;
+
+   } else {
+      wm->thread0.grf_reg_count = prog_data->reg_blocks;
+      wm->wm9.grf_reg_count_2 = prog_data->reg_blocks_16;
+
+      wm->wm5.enable_8_pix = 1;
+      if (prog_data->prog_offset_16)
+         wm->wm5.enable_16_pix = 1;
+
+      wm->thread0.kernel_start_pointer =
+         brw_program_reloc(brw,
+                           brw->wm.base.state_offset +
+                           offsetof(struct brw_wm_unit_state, thread0),
+                           brw->wm.base.prog_offset +
+                           (wm->thread0.grf_reg_count << 1)) >> 6;
+
+      wm->wm9.kernel_start_pointer_2 =
+         brw_program_reloc(brw,
+                           brw->wm.base.state_offset +
+                           offsetof(struct brw_wm_unit_state, wm9),
+                           brw->wm.base.prog_offset +
+                           prog_data->prog_offset_16 +
+                           (wm->wm9.grf_reg_count_2 << 1)) >> 6;
+   }
 
    wm->thread1.depth_coef_urb_read_offset = 1;
    if (prog_data->base.use_alt_mode)
@@ -172,10 +189,6 @@ brw_upload_wm_unit(struct brw_context *brw)
    wm->wm5.program_uses_killpixel =
       prog_data->uses_kill || ctx->Color.AlphaEnabled;
 
-   wm->wm5.enable_8_pix = 1;
-   if (prog_data->prog_offset_16)
-      wm->wm5.enable_16_pix = 1;
-
    wm->wm5.max_threads = brw->max_wm_threads - 1;
 
    /* _NEW_BUFFERS | _NEW_COLOR */