iio: temp: maxim_thermocouple: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:57:12 +0000 (18:57 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:19 +0000 (11:53 +0100)
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition

Fixes: 1f25ca11d84a ("iio: temperature: add support for Maxim thermocouple chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-93-jic23@kernel.org
drivers/iio/temperature/maxim_thermocouple.c

index 98c41cd..c28a7a6 100644 (file)
@@ -122,7 +122,7 @@ struct maxim_thermocouple_data {
        struct spi_device *spi;
        const struct maxim_thermocouple_chip *chip;
 
-       u8 buffer[16] ____cacheline_aligned;
+       u8 buffer[16] __aligned(IIO_DMA_MINALIGN);
        char tc_type;
 };