ARM: tegra: cardhu: Support CPU thermal throttling

Enable CPU thermal throttling on Tegra30 Cardhu board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 42ea949..844ed70 100644 (file)
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/thermal/thermal.h>
 #include "tegra30.dtsi"
 #include "tegra30-cpu-opp.dtsi"
 #include "tegra30-cpu-opp-microvolt.dtsi"
@@ -341,12 +342,13 @@
                        };
                };
 
-               temperature-sensor@4c {
+               nct1008: temperature-sensor@4c {
                        compatible = "onnn,nct1008";
                        reg = <0x4c>;
                        vcc-supply = <&sys_3v3_reg>;
                        interrupt-parent = <&gpio>;
                        interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
+                       #thermal-sensor-cells = <1>;
                };
 
                vdd_core: tps62361@60 {
@@ -440,21 +442,25 @@
                cpu0: cpu@0 {
                        cpu-supply = <&vddctrl_reg>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
                        cpu-supply = <&vddctrl_reg>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@2 {
                        cpu-supply = <&vddctrl_reg>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@3 {
                        cpu-supply = <&vddctrl_reg>;
                        operating-points-v2 = <&cpu0_opp_table>;
+                       #cooling-cells = <2>;
                };
        };
 
@@ -637,6 +643,41 @@
                                         <&tegra_car TEGRA30_CLK_EXTERN1>;
        };
 
+       thermal-zones {
+               cpu-thermal {
+                       polling-delay-passive = <1000>; /* milliseconds */
+                       polling-delay = <5000>; /* milliseconds */
+
+                       thermal-sensors = <&nct1008 1>;
+
+                       trips {
+                               trip0: cpu-alert0 {
+                                       /* throttle at 57C until temperature drops to 56.8C */
+                                       temperature = <57000>;
+                                       hysteresis = <200>;
+                                       type = "passive";
+                               };
+
+                               trip1: cpu-crit {
+                                       /* shut down at 60C */
+                                       temperature = <60000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&trip0>;
+                                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+               };
+       };
+
        gpio-keys {
                compatible = "gpio-keys";