Don't activate blend fallbacks unless blending is enabled

diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index 8e9485a..1ca4252 100644 (file)
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -292,6 +292,9 @@ static struct {
        { R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" },
        { R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" },
        { R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
+       { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
+       { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
+       { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_1" },
 };
 
 
@@ -1168,6 +1171,8 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
                }
 
 
+               printk("Upload to %x\n", tex->offset);
+
                /* Dispatch the indirect buffer.
                 */
                buffer = (u32*)((char*)dev_priv->buffers->handle + buf->offset);

diff --git a/shared/radeon_state.c b/shared/radeon_state.c
index 8e9485a..1ca4252 100644 (file)
--- a/shared/radeon_state.c
+++ b/shared/radeon_state.c
@@ -292,6 +292,9 @@ static struct {
        { R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" },
        { R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" },
        { R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
+       { RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
+       { RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
+       { RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_1" },
 };
 
 
@@ -1168,6 +1171,8 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
                }
 
 
+               printk("Upload to %x\n", tex->offset);
+
                /* Dispatch the indirect buffer.
                 */
                buffer = (u32*)((char*)dev_priv->buffers->handle + buf->offset);