arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generation

Convert ID_AA64AFRn_EL1 to automatic generation as per DDI0487I.a, no
functional changes.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220910163354.860255-7-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 9a7d84d..debc1c0 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -190,9 +190,6 @@
 #define SYS_MVFR1_EL1                  sys_reg(3, 0, 0, 3, 1)
 #define SYS_MVFR2_EL1                  sys_reg(3, 0, 0, 3, 2)
 
-#define SYS_ID_AA64AFR0_EL1            sys_reg(3, 0, 0, 5, 4)
-#define SYS_ID_AA64AFR1_EL1            sys_reg(3, 0, 0, 5, 5)
-
 #define SYS_ACTLR_EL1                  sys_reg(3, 0, 1, 0, 1)
 #define SYS_RGSR_EL1                   sys_reg(3, 0, 1, 0, 5)
 #define SYS_GCR_EL1                    sys_reg(3, 0, 1, 0, 6)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 076766b..7f1fb36 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -319,6 +319,22 @@ Sysreg     ID_AA64DFR1_EL1 3       0       0       5       1
 Res0   63:0
 EndSysreg
 
+Sysreg ID_AA64AFR0_EL1 3       0       0       5       4
+Res0   63:32
+Field  31:28   IMPDEF7
+Field  27:24   IMPDEF6
+Field  23:20   IMPDEF5
+Field  19:16   IMPDEF4
+Field  15:12   IMPDEF3
+Field  11:8    IMPDEF2
+Field  7:4     IMPDEF1
+Field  3:0     IMPDEF0
+EndSysreg
+
+Sysreg ID_AA64AFR1_EL1 3       0       0       5       5
+Res0   63:0
+EndSysreg
+
 Sysreg ID_AA64ISAR0_EL1        3       0       0       6       0
 Enum   63:60   RNDR
        0b0000  NI