r = amdgpu_cs_query_fence_status(&fence_status, &expired);
CU_ASSERT_EQUAL(r, 0);
+ r = amdgpu_cs_free_ib(ib_result.handle);
+ CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_cs_free_ib(ib_result_ce.handle);
+ CU_ASSERT_EQUAL(r, 0);
+
r = amdgpu_cs_ctx_free(context_handle);
CU_ASSERT_EQUAL(r, 0);
}
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
CU_ASSERT_EQUAL(r, 0);
+ r = amdgpu_cs_free_ib(ib_result.handle);
+ CU_ASSERT_EQUAL(r, 0);
+
r = amdgpu_cs_ctx_free(context_handle);
CU_ASSERT_EQUAL(r, 0);
}
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
CU_ASSERT_EQUAL(r, 0);
+
+ r = amdgpu_cs_free_ib(ib_result.handle);
+ CU_ASSERT_EQUAL(r, 0);
}
r = amdgpu_cs_ctx_free(context_handle);
r = amdgpu_cs_query_fence_status(&fence_status, &expired);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(expired, true);
+
+ r = amdgpu_cs_free_ib(ib_result.handle);
+ CU_ASSERT_EQUAL(r, 0);
}
static void amdgpu_command_submission_sdma_write_linear(void)
if (r)
return r;
- r = amdgpu_cs_alloc_ib(context_handle, IB_SIZE, &ib_result);
- if (r)
- return r;
-
- ib_handle = ib_result.handle;
- ib_cpu = ib_result.cpu;
-
fence_status.context = context_handle;
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
fence_status.ip_type = ip;