freedreno/registers: Add control reg for zap fw base

The zap shader knows the offset of the embedded shader within the zap
sqe instructions, but uses this control reg to get it's own address in
memory, in order to calculate the address of the compute shader part of
the zap shader.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21748>

diff --git a/src/freedreno/registers/adreno/adreno_control_regs.xml b/src/freedreno/registers/adreno/adreno_control_regs.xml
index 9876c97..8e14cde 100644 (file)
--- a/src/freedreno/registers/adreno/adreno_control_regs.xml
+++ b/src/freedreno/registers/adreno/adreno_control_regs.xml
@@ -147,6 +147,13 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
        <reg32 name="PACKET_TABLE_WRITE_ADDR" offset="0x060"/>
        <reg32 name="PACKET_TABLE_WRITE" offset="0x061"/>
 
+       <doc>
+               The zap shader uses the base address of itself, adding the offset of the embedded
+               shader instructions, to program SP_CS_OBJ_START with the address of the shader
+               part of the zap "shader"
+       </doc>
+       <reg64 name="ZAP_SHADER_ADDR" offset="0x062"/>
+
        <doc> Resettable counter used to implement PERF_CP_LONG_PREEMPTIONS </doc>
        <reg32 name="PREEMPTION_TIMER" offset="0x06e"/>
        <doc> Seemingly used to start/stop PREEMPTION_TIMER </doc>