clk: rockchip: fix faulty vip parent name on rk3288
authorHeiko Stuebner <heiko@sntech.de>
Thu, 18 Jun 2015 14:18:29 +0000 (16:18 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Mon, 6 Jul 2015 22:03:23 +0000 (15:03 -0700)
The video input processor (vip) was called camera interface (cif) on
older socs which seems to have resulted in a copy'n'paste error when
creating the rk3288 camera clocks.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/rockchip/clk-rk3288.c

index 0211162..df9dc96 100644 (file)
@@ -189,7 +189,7 @@ PNAME(mux_uart1_p)  = { "uart1_src", "uart1_frac", "xin24m" };
 PNAME(mux_uart2_p)     = { "uart2_src", "uart2_frac", "xin24m" };
 PNAME(mux_uart3_p)     = { "uart3_src", "uart3_frac", "xin24m" };
 PNAME(mux_uart4_p)     = { "uart4_src", "uart4_frac", "xin24m" };
-PNAME(mux_cif_out_p)   = { "cif_src", "xin24m" };
+PNAME(mux_vip_out_p)   = { "vip_src", "xin24m" };
 PNAME(mux_mac_p)       = { "mac_pll_src", "ext_gmac" };
 PNAME(mux_hsadcout_p)  = { "hsadc_src", "ext_hsadc" };
 PNAME(mux_edp_24m_p)   = { "ext_edp_24m", "xin24m" };
@@ -434,7 +434,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
        COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
                        RK3288_CLKSEL_CON(26), 8, 1, MFLAGS,
                        RK3288_CLKGATE_CON(3), 7, GFLAGS),
-       COMPOSITE_NOGATE(0, "sclk_vip_out", mux_cif_out_p, 0,
+       COMPOSITE_NOGATE(0, "sclk_vip_out", mux_vip_out_p, 0,
                        RK3288_CLKSEL_CON(26), 15, 1, MFLAGS, 9, 5, DFLAGS),
 
        DIV(0, "pclk_pd_alive", "gpll", 0,